Datasheet

NXP Semiconductors Quick start ADC1412D, ADC1212D, ADC1112D series

Quick start

QS_ADC1412D_10.doc

NXP B.V.

2010

Quick start Rev. 10 — 17 December 2010 20 of 27

Before proceeding to any acquisition, the user needs to do the following entries:

• the sampling frequency Fs: 80 Msps in our example (field );

• the input frequency Fin: 175 MHz in our example for both ADC channels (field );

• the number of samples to be acquired 16384 in our example (field );

• indicate whether it is CMOS or LVDS DDR (field );

• press the “INITIALIZATION” button . It will initialized the HSDC-EXTMOD board:

− FPGA is ready (red LED is flashing ¼ on and ¾ off) ;

− PLL embedded is locked (green LED is on);

• indicate whether Fin or Fs are coherent or not (field ):

− if signals are coherent, selected which Fin or Fs are fixed for the calculation (see

appendix A.1);

− if signals are not coherent, select the window for FFT processing to apply (the

Blackman window gives better results).

• press the “ACQUIRE” button  to display the results from the FFT processing. The

results fields  will be updated automatically depending on the display choice using

the “Display …” button (“Display ADC0” or “Display ADC1” or “Display ADC0 &

ADC1”).

• press “STOP” button to stop acquisition;

• field  allows to do FFT averaging over up to 255 trials, suitable for small signal

analysis;

• field  allows to store dynamic results to text file. Click on the check box, enter a

header as a comment and browse to indicate where to store data file. Table 7 shows

how data are stored:

Table 7. Dynamic results as stored in a text file

Content of file is shown as table format

Name Fin Fs Vin ENOB SINAD SNR_C SNR_FS SFDR_C SFDR_FS THD H2 H3 H4 H5 H6

(MHz) (MHz) (dBFS) - (dBc) (dBc) (dBFS) (dBc) (dBFS) (dBc) (dBc) (dBc) (dBc) (dBc) (dBc)

ADC1412D080 test

ADC0 175.00 80.00 -1.08 11.10 68.84 68.56 69.93 83.04 84.12 -80.59 -84.17 -86.48 -106.34 -92.16 -100.45

ADC1 175.00 80.00 -86.74 -5.89 -33.71 -33.71 53.04 -19.91 66.84 4.77 -103.19 -119.04 -111.66 -110.96 -120.78

Note that ADC0 and ADC1 refer to the acquisition path on the HSDC-EXTMOD board. It

corresponds respectively to the bottom and top ADC of the ADC1412D, ADC1212D and

ADC1112D series.

Note that while acquisition is running, any other action (ADC SPI programming, quit or

refresh) is not possible. Stop acquisition first before proceeding to any other task.

3.3.6.1 FFT spectrum

The first graph to be displayed is the FFT spectrum of the digital pattern acquired: