Datasheet

ADC1010S_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 28 December 2010 6 of 39
NXP Semiconductors
ADC1010S series
Single 10-bit ADC; CMOS or LVDS DDR digital outputs
9. Static characteristics
Table 6. Static characteristics
[1]
Symbol Parameter Conditions Min Typ Max Unit
Supplies
V
DDA
analog supply voltage 2.85 3.0 3.4 V
V
DDO
output supply voltage CMOS mode 1.65 1.8 3.6 V
LVDS DDR mode 2.85 3.0 3.6 V
I
DDA
analog supply current f
clk
=125Msps; f
i
=70MHz - 210 - mA
I
DDO
output supply current CMOS mode; f
clk
=125Msps;
f
i
=70MHz
-10-mA
LVDS DDR mode:
f
clk
=125Msps; f
i
=70MHz
-35-mA
P power dissipation ADC1010S125;
analog supply only
-630-mW
ADC1010S105;
analog supply only
-550-mW
ADC1010S080;
analog supply only
-430-mW
ADC1010S065;
analog supply only
-380-mW
Power-down mode - 2 - mW
Sleep mode - 40 - mW
Clock inputs: pins CLKP and CLKM
Low-Voltage Positive Emitter-Coupled Logic (LVPECL)
V
i(clk)dif
differential clock input voltage peak-to-peak - 1.6 - V
SINE wave
V
i(clk)dif
differential clock input voltage peak - ±3.0 - V
Low Voltage Complementary Metal Oxide Semiconductor (LVCMOS)
V
IL
LOW-level input voltage - - 0.3V
DDA
V
V
IH
HIGH-level input voltage 0.7V
DDA
--V
Logic inputs: pins PWD and OE
V
IL
LOW-level input voltage 0 - 0.8 V
V
IH
HIGH-level input voltage 2 - V
DDA
V
I
IL
LOW-level input current - 55 - μA
I
IH
HIGH-level input current - 65 - μA
Serial peripheral interface: pins CS
, SDIO/ODS, SCLK/DFS
V
IL
LOW-level input voltage 0 - 0.3V
DDA
V
V
IH
HIGH-level input voltage 0.7V
DDA
-V
DDA
V
I
IL
LOW-level input current −10 - +10 μA
I
IH
HIGH-level input current −50 - +50 μA
C
I
input capacitance - 4 - pF