Datasheet

74LVC1G53 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 9 — 5 April 2013 3 of 27
NXP Semiconductors
74LVC1G53
2-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
Fig 2. Logic diagram
001aad387
Z
Y0
S
Y1
E
Fig 3. Pin configuration SOT505-2 and SOT765-1 Fig 4. Pin configuration SOT833-1, SOT1089,
SOT1116 and SOT1203
74LVC1G53
ZV
CC
EY0
GND Y1
GND S
001aad388
1
2
3
4
6
5
8
7
74LVC1G53
Y1
Y0
V
CC
S
GND
E
Z
GND
001aad389
36
27
18
45
Transparent top view