Datasheet

74LVC1G53 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 9 — 5 April 2013 12 of 27
NXP Semiconductors
74LVC1G53
2-channel analog multiplexer/demultiplexer
11.1 Waveforms and test circuits
Measurement points are given in Table 10.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 16. Input (Yn or Z) to output (Z or Yn) propagation delays
t
PLH
t
PHL
V
M
V
M
V
M
V
M
GND
V
I
V
OH
V
OL
Yn or Z
input
Z or Yn
output
001aac361
Measurement points are given in Table 10.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 17. Enable and disable times
V
M
V
I
GND
V
CC
V
OL
V
OH
GND
S, E input
output
LOW to OFF
OFF to LOW
output
HIGH to OFF
OFF to HIGH
V
M
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V
M
t
PZL
t
PHZ
t
PZH
V
X
V
Y
switch
disabled
switch
enabled
switch
enabled
Z, Yn
Z, Yn
t
PLZ
Table 10. Measurement points
Supply voltage Input Output
V
CC
V
M
V
M
V
X
V
Y
1.65 V to 2.7 V 0.5 V
CC
0.5 V
CC
V
OL
+0.15V V
OH
0.15 V
2.7 V to 5.5 V 0.5 V
CC
0.5 V
CC
V
OL
+0.3V V
OH
0.3 V