Datasheet

74LVC161 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 30 September 2013 10 of 22
NXP Semiconductors
74LVC161
Presettable synchronous 4-bit binary counter; asynchronous reset
t
PHL
HIGH to LOW
propagation
delay
MR to Qn; see Figure 11
V
CC
= 1.2 V - 17 - - - ns
V
CC
= 1.65 V to 1.95 V 1.5 6.2 12.7 1.5 14.6 ns
V
CC
= 2.3 V to 2.7 V 1.9 3.6 7.1 1.9 8.3 ns
V
CC
= 2.7 V 1.5 3.9 7.1 1.5 9.0 ns
V
CC
= 3.0 V to 3.6 V 1.5 3.2 6.4 1.5 8.0 ns
MR
to TC; see Figure 11
V
CC
= 1.2 V - 18 - - - ns
V
CC
= 1.65 V to 1.95 V 1.7 8.3 15.9 1.7 18.4 ns
V
CC
= 2.3 V to 2.7 V 2.7 4.8 8.9 2.7 10.3 ns
V
CC
= 2.7 V 1.5 4.9 8.6 1.5 11.0 ns
V
CC
= 3.0 V to 3.6 V 1.5 4.3 8.0 1.5 10.0 ns
t
W
pulse width clock HIGH or LOW; see Figure 9
V
CC
= 1.65 V to 1.95 V 6.0 - - 6.0 - ns
V
CC
= 2.3 V to 2.7 V 5.0 - - 5.0 - ns
V
CC
= 2.7 V 5.0 - - 5.0 - ns
V
CC
= 3.0 V to 3.6 V 4.0 1.2 - 4.0 - ns
master reset LOW; see Figure 11
V
CC
= 1.65 V to 1.95 V 5.0 - - 5.0 - ns
V
CC
= 2.3 V to 2.7 V 4.0 - - 4.0 - ns
V
CC
= 2.7 V 4.0 - - 4.0 - ns
V
CC
= 3.0 V to 3.6 V 3.0 1.6 - 3.0 - ns
t
rec
recovery time MR to CP; see Figure 11
V
CC
= 1.65 V to 1.95 V 1.0 - - 1.0 - ns
V
CC
= 2.3 V to 2.7 V 1.0 - - 1.0 - ns
V
CC
= 2.7 V 0.0 - - 0.0 - ns
V
CC
= 3.0 V to 3.6 V 0.5 0.0 - 0.5 - ns
Table 7. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 14.
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max