Datasheet

74LV4051 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 17 September 2014 4 of 27
NXP Semiconductors
74LV4051
8-channel analog multiplexer/demultiplexer
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) This is not a supply pin. The
substrate is attached to this pad
using conductive die attach
material. There is no electrical or
mechanical requirement to
solder this pad. However, if it is
soldered, the solder land should
remain floating or be connected
to V
CC
.
Fig 5. Pin configuration SOT38-4
and SOT109-1
Fig 6. Pin configuration
SOT338-1 and SOT403-1
Fig 7. Pin configuration for
SOT763-1
74LV4051
Y4 V
CC
Y6 Y2
ZY1
Y7 Y0
Y5 Y3
ES0
V
EE
S1
GND S2
001aak433
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
74LV4051
Y4 V
CC
Y6 Y2
ZY1
Y7 Y0
Y5 Y3
ES0
V
EE
S1
GND S2
001aak407
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
001aak408
74LV4051
V
EE
S1
ES0
Y5 Y3
Y7 Y0
ZY1
Y6 Y2
GND
S2
Y4 V
CC
Transparent top view
7 10
6 11
5 12
4
13
3 14
2 15
8 9
1
16
terminal 1
index area
V
CC
(1)
Table 2. Pin description
Symbol Pin Description
E
6 enable input (active LOW)
V
EE
7 supply voltage
GND 8 ground supply voltage
S0, S1, S2 11, 10, 9 select input
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 13, 14, 15, 12, 1, 5, 2, 4 independent input or output
Z 3 common output or input
V
CC
16 supply voltage