Datasheet
74HC_HCT74 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 27 August 2012 7 of 21
NXP Semiconductors
74HC74; 74HCT74
Dual D-type flip-flop with set and reset; positive edge-trigger
10. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit see Figure 9.
Symbol Parameter Conditions T
amb
= 40 C to +85 C T
amb
= 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
74HC74
t
pd
propagation
delay
nCP to nQ, nQ; see
Figure 7
[2]
V
CC
= 2.0 V - 47 220 - 265 ns
V
CC
= 4.5 V - 17 44 - 53 ns
V
CC
=5V; C
L
=15pF - 14 - - - ns
V
CC
= 6.0 V - 14 37 - 45 ns
nS
D to nQ, nQ; see
Figure 8
[2]
V
CC
= 2.0 V - 50 250 - 300 ns
V
CC
= 4.5 V - 18 50 - 60 ns
V
CC
=5V; C
L
=15pF - 15 - - - ns
V
CC
= 6.0 V - 14 43 - 51 ns
nR
D to nQ, nQ; see
Figure 8
[2]
V
CC
= 2.0 V - 52 250 - 300 ns
V
CC
= 4.5 V - 19 50 - 60 ns
V
CC
=5V; C
L
=15pF - 16 - - - ns
V
CC
= 6.0 V - 15 43 - 51 ns
t
t
transition
time
nQ, nQ; see Figure 7
[3]
V
CC
= 2.0 V - 19 95 - 110 ns
V
CC
= 4.5 V - 7 19 - 22 ns
V
CC
= 6.0 V - 6 16 - 19 ns
t
W
pulse width nCP HIGH or LOW;
see Figure 7
V
CC
= 2.0 V 100 19 - 120 - ns
V
CC
= 4.5 V 20 7 - 24 - ns
V
CC
= 6.0 V 17 6 - 20 - ns
nS
D, nRD LOW;
see Figure 8
V
CC
= 2.0 V 100 19 - 120 - ns
V
CC
= 4.5 V 20 7 - 24 - ns
V
CC
= 6.0 V 17 6 - 20 - ns
t
rec
recovery
time
nSD, nRD; see Figure 8
V
CC
= 2.0 V 40 3 - 45 - ns
V
CC
= 4.5 V 8 1 - 9 - ns
V
CC
= 6.0 V 7 1 - 8 - ns