Datasheet

74HC_HCT597 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3 — 15 April 2014 6 of 23
NXP Semiconductors
74HC597; 74HCT597
8-bit shift register with input flip-flops
7. Limiting values
[1] For DIP16 package: P
tot
derates linearly with 12 mW/K above 70 C.
[2] For SO16: P
tot
derates linearly with 8 mW/K above 70 C.
For SSOP16 and TSSOP16 packages: P
tot
derates linearly with 5.5 mW/K above 60 C.
8. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +7 V
I
IK
input clamping current V
I
< 0.5 V or V
I
>V
CC
+0.5 V - 20 mA
I
OK
output clamping current V
O
< 0.5 V or V
O
>V
CC
+0.5V - 20 mA
I
O
output current V
O
= 0.5 V to (V
CC
+0.5V) - 25 mA
I
CC
supply current - +50 mA
I
GND
ground current 50 - mA
T
stg
storage temperature 65 +150 C
P
tot
total power dissipation DIP16 package
[1]
- 750 mW
SO16, SSOP16 and TSSOP16 packages
[2]
- 500 mW
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter Conditions 74HC597 74HCT597 Unit
Min Typ Max Min Typ Max
V
CC
supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
V
I
input voltage 0 - V
CC
0- V
CC
V
V
O
output voltage 0 - V
CC
0- V
CC
V
T
amb
ambient temperature 40 +25 +125 40 +25 +125 C
t/V input transition rise and fall rate V
CC
= 2.0 V - - 625 - - - ns/V
V
CC
= 4.5 V - 1.67 139 - 1.67 139 ns/V
V
CC
= 6.0 V--83---ns/V