Datasheet
74HC_HCT597 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3 — 15 April 2014 11 of 23
NXP Semiconductors
74HC597; 74HCT597
8-bit shift register with input flip-flops
74HCT597
t
pd
propagation
delay
SHCP to Q; see Figure 8
[1]
V
CC
= 4.5 V - 23 40 - 50 - 60 ns
V
CC
= 5.0 V; C
L
=15pF - 20 - - - - - ns
MR
to Q; see Figure 9
[1]
V
CC
= 4.5 V - 28 49 - 61 - 74 ns
STCP to Q; see Figure 8
[1]
V
CC
= 4.5 V - 33 57 - 71 - 86 ns
V
CC
= 5.0 V; C
L
=15pF - 29 - - - - - ns
PL
to Q; see Figure 10
[1]
V
CC
= 4.5 V - 30 52 - 65 - 78 ns
V
CC
= 5.0 V; C
L
=15pF - 26 - - - - - ns
t
t
transition
time
see Figure 8
[2]
V
CC
= 4.5 V - 7 15 - 19 - 22 ns
t
W
pulse width STCP HIGH or LOW;
see Figure 8
V
CC
= 4.5 V 16 6 - 20 - 24 - ns
SHCP HIGH or LOW;
see Figure 8
V
CC
= 4.5 V 16 7 - 20 - 24 - ns
MR
LOW; see Figure 9
V
CC
= 4.5 V 25 14 - 31 - 38 - ns
PL
LOW; see Figure 10
V
CC
= 4.5 V 20 10 - 25 - 30 - ns
t
rec
recovery
time
MR to SHCP; see
Figure 11
V
CC
= 4.5 V 12 2-15 - 18 - ns
t
su
set-up time Dn to STCP; see
Figure 12
V
CC
= 4.5 V 12 5 - 15 - 18 - ns
DS to SHCP; see
Figure 12
V
CC
= 4.5 V 12 2 - 15 - 18 - ns
PL
to SHCP; see
Figure 13
V
CC
= 4.5 V 12 4 - 15 - 18 - ns
Table 7. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit, see Figure 14.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
