Datasheet

74HC_HCT597 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3 — 15 April 2014 10 of 23
NXP Semiconductors
74HC597; 74HCT597
8-bit shift register with input flip-flops
t
su
set-up time Dn to STCP; see
Figure 12
V
CC
= 2.0 V 60 8 - 75 - 90 - ns
V
CC
= 4.5 V 12 3 - 15 - 18 - ns
V
CC
= 6.0 V 10 2 - 13 - 15 - ns
DS to SHCP; see
Figure 12
V
CC
= 2.0 V 60 11 - 75 - 90 - ns
V
CC
= 4.5 V 12 4 - 15 - 18 - ns
V
CC
= 6.0 V 10 3 - 13 - 15 - ns
PL
to SHCP; see
Figure 13
V
CC
= 2.0 V 60 11 - 75 - 90 - ns
V
CC
= 4.5 V 12 4 - 15 - 18 - ns
V
CC
= 6.0 V 10 3 - 13 - 15 - ns
t
h
hold time Dn to STCP; see
Figure 12
V
CC
= 2.0 V 5 3- 5 - 5 - ns
V
CC
= 4.5 V 5 1- 5 - 5 - ns
V
CC
= 6.0 V 5 1- 5 - 5 - ns
PL
, DS to SHCP; see
Figure 12
V
CC
= 2.0 V 5 6- 5 - 5 - ns
V
CC
= 4.5 V 5 2- 5 - 5 - ns
V
CC
= 6.0 V 5 2- 5 - 5 - ns
f
max
maximum
frequency
SHCP; see Figure 8
V
CC
= 2.0 V 6.0 29 - 4.8 - 4.0 - MHz
V
CC
= 4.5 V 30 87 - 24 - 20 - MHz
V
CC
= 5.0 V; C
L
= 15 pF - 96 - - - - - MHz
V
CC
= 6.0 V 35 104 - 28 - 24 - MHz
C
PD
power
dissipation
capacitance
C
L
= 50 pF; f = 1 MHz;
V
I
=GNDtoV
CC
[3]
-29- - - - -pF
Table 7. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit, see Figure 14.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max