Datasheet

74HC_HCT4094 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 31 December 2012 13 of 23
NXP Semiconductors
74HC4094; 74HCT4094
8-stage shift-and-store bus register
Measurement points are given in Table 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 9. Propagation delay strobe input (STR) to output (QPn), strobe input (STR) pulse width and the clock
set-up and hold times for strobe input
t
W
t
PHL
t
PLH
t
h
V
I
GND
V
OH
V
OL
QPn output
STR input
V
M
V
M
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t
su
V
I
GND
CP input
V
M
Measurement points are given in Table 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 10. The data input (D) to clock input (CP) set-up times and clock input (CP) to data input (D) hold times
001aaf115
GND
GND
t
h
t
su
t
h
t
su
V
M
V
M
V
M
V
I
V
OH
V
OL
V
I
QPn, QS1, QS2 output
CP input
D input