Datasheet

74HC_HCT4066 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7 — 2 April 2013 4 of 25
NXP Semiconductors
74HC4066; 74HCT4066
Quad single-pole single-throw analog switch
6. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level.
7. Limiting values
[1] To avoid drawing V
CC
current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no V
CC
current will flow out of terminals Yn. In this case there is
no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed V
CC
or GND.
[2] For DIP14 package: P
tot
derates linearly with 12 mW/K above 70 C.
For SO14 package: P
tot
derates linearly with 8 mW/K above 70 C.
For (T)SSOP14 packages: P
tot
derates linearly with 5.5 mW/K above 60 C.
For DHVQFN14 packages: P
tot
derates linearly with 4.5 mW/K above 60 C.
Table 3. Function table
[1]
Input nE Switch
LOFF
HON
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +11.0 V
I
IK
input clamping current V
I
< 0.5 V or V
I
>V
CC
+0.5V - 20 mA
I
SK
switch clamping current V
SW
< 0.5 V or V
SW
>V
CC
+0.5V - 20 mA
I
SW
switch current V
SW
= 0.5 V to V
CC
+0.5V
[1]
- 25 mA
I
CC
supply current - 50 mA
I
GND
ground current - 50 mA
T
stg
storage temperature 65 +150 C
P
tot
total power dissipation T
amb
= 40 C to +125 C
[2]
DIP14 package - 750
SO14, (T)SSOP14 and DHVQFN14
packages
-500
P power dissipation per switch - 100 mW