Datasheet

74HC4049 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6 — 8 January 2013 3 of 15
NXP Semiconductors
74HC4049
Hex inverting HIGH-to-LOW level shifter
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
[1] For DIP16 package: P
tot
derates linearly with 12 mW/K above 70 C.
[2] For SO16 package: P
tot
derates linearly with 8 mW/K above 70 C.
For SSOP16 and TSSOP16 packages: P
tot
derates linearly with 5.5 mW/K above 60 C.
Table 2. Pin description
Symbol Pin Description
V
CC
1 supply voltage
1Y to 6Y 2, 4, 6, 10, 12, 15 output
1A to 6A 3, 5, 7, 9, 11, 14 input
GND 8 ground (0 V)
n.c. 13, 16 not connected
Table 3. Function table
[1]
Input Output
nA nY
LH
HL
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +7 V
V
IK
input clamping voltage 0.5 +16 V
I
IK
input clamping current V
I
< 0.5 V 20 - mA
I
OK
output clamping current V
O
< 0.5 V or V
O
>V
CC
+0.5V - 20 mA
I
O
output current V
O
= 0.5 V to (V
CC
+0.5V) - 25 mA
I
CC
supply current - +50 mA
I
GND
ground current - 50 mA
T
stg
storage temperature 65 +150 C
P
tot
total power dissipation DIP16 package
[1]
- 750 mW
SO16, SSOP16 and TSSOP16 packages
[2]
- 500 mW