Datasheet

1997 Nov 25 12
Philips Semiconductors Product specification
Phase-locked-loop with VCO 74HC/HCT4046A
Note
1. The parallel value of R1 and R2 should be more than 2.7 kΩ. Optimum performance is achieved when R1 and/ or
R2 are/is > 10 kΩ.
Demodulator section
Voltages are referenced to GND (ground = 0 V)
R
2
resistor range 3.0 300 kΩ 3.0 note 1
3.0 300 4.5
3.0 300 6.0
C1 capacitor range 40 no
limit
pF 3.0
40 4.5
40 6.0
V
VCOIN
operating voltage
range at VCO
IN
1.1 1.9 V 3.0 over the range
specified for
R1; for linearity
see Figs 20
and 21
1.1 3.4 4.5
1.1 4.9 6.0
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
V
OTHER
+25 −40 to+85 −40 to +125
min. typ. max. min. max. min. max.
R
S
resistor range 50 300 kΩ 3.0 at R
S
> 300 kΩ
the leakage current can
influence V
DEMOUT
50 300 4.5
50 300 6.0
V
OFF
offset voltage
VCO
IN
to V
DEMOUT
±30 mV 3.0 V
I
=V
VCOIN
= 1/2 V
CC
;
values taken over
R
S
range; see Fig.15
±20 4.5
±10 6.0
R
D
dynamic output
resistance at DEM
OUT
25 Ω 3.0 V
DEMOUT
= 1/2 V
CC
25 4.5
25 6.0
SYM-
BOL
PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC V
CC
(V)
V
I
OTHER
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.