Datasheet

74HC_HCT373 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 13 December 2011 4 of 26
NXP Semiconductors
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
supply pin or input.
Fig 6. Pin configuration DIP20, SO20, SSOP20 and
TSSOP20
Fig 7. Pin configuration DHVQFN20
74HC373
74HCT373
OE V
CC
Q0 Q7
D0 D7
D1 D6
Q1 Q6
Q2 Q5
D2 D5
D3 D4
Q3 Q4
GND LE
001aae046
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
001aae047
74HC373
74HCT373
Transparent top view
Q4
D3
Q3
D4
D2 D5
Q2 Q5
Q1 Q6
D1 D6
D0 D7
Q0
GND
(1)
Q7
GND
LE
OE V
CC
9
12
8 13
7 14
6 15
5 16
4 17
3 18
2 19
10 11
1
20
terminal 1
index area
Table 2. Pin description
Symbol Pin Description
OE
1 3-state output enable input (active LOW)
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 2, 5, 6, 9, 12, 15, 16, 19 3-state latch output
D0, D1, D2, D3, D4, D5, D6, D7 3, 4, 7, 8, 13, 14, 17, 18 data input
GND 10 ground (0 V)
LE 11 latch enable input (active HIGH)
V
CC
20 supply voltage