Datasheet

74HC_HCT299_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 July 2008 9 of 24
NXP Semiconductors
74HC299; 74HCT299
8-bit universal shift register; 3-state
[1] C
PD
is used to determine the dynamic power dissipation (P
D
in µW).
P
D
=C
PD
× V
CC
2
× f
i
+ ∑(C
L
× V
CC
2
× f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
V
IL
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V
V
OH
HIGH-level
output voltage
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
all outputs
I
O
= −20 µA 4.4 4.5 - 4.4 - 4.4 - V
standard outputs
I
O
= −4.0 mA 3.98 4.32 - 3.84 - 3.7 - V
bus driver outputs
I
O
= −6.0 mA 3.98 4.32 - 3.84 - 3.7 - V
V
OL
LOW-level
output voltage
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
all outputs
I
O
= 20 µA - 0 0.1 - 0.1 - 0.1 V
standard outputs
I
O
= 4.0 mA - 0.15 0.26 - 0.33 - 0.4 V
bus driver outputs
I
O
= 6.0 mA - 0.16 0.26 - 0.33 - 0.4 V
I
I
input leakage
current
V
I
= V
CC
or GND;
V
CC
= 5.5 V
--±0.1 - ±1.0 - ±1.0 µA
I
OZ
OFF-state output
current
V
I
=V
IH
or V
IL
;V
O
=V
CC
or
GND per input pin; other
inputs at V
CC
or GND;
I
O
= 0 A; V
CC
= 5.5 V
--±0.5 - ±5.0 - ±10.0 µA
I
CC
supply current V
I
=V
CC
or GND; I
O
=0A;
V
CC
= 5.5 V
- - 8.0 - 80 - 160 µA
∆I
CC
additional supply
current
per input pin;
V
I
=V
CC
− 2.1 V;
other inputs at V
CC
or
GND; I
O
=0A;
V
CC
= 4.5 V to 5.5 V
I/On, DSR, DSL,
MR
and S1
- 25 90 - 112.5 - 122.5 µA
CP, S0 - 60 216 - 270 - 294 µA
OEn - 30 108 - 135 - 147 µA
C
I
input capacitance - 3.5 - - - - - pF
C
I/O
input/output
capacitance
-10-----pF
C
PD
power dissipation
capacitance
per package
[1]
-125-----pF
Table 6. Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C −40 °C to
+85 °C
−40 °C to
+125 °C
Unit
Min Typ Max Min Max Min Max