Datasheet

74HC237 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 23 August 2012 3 of 17
NXP Semiconductors
74HC237
3-to-8 line decoder, demultiplexer with address latches
5. Pinning information
5.1 Pinning
Fig 4. Logic diagram
001aab872
E1
E2
A0
A1
A2
LE
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A0
A0
LELE
LATCH
A1
A1
LELE
LATCH
A2
A2
LELE
LATCH
Fig 5. Pin configuration DIP16 and SO16 Fig 6. Pin configuration SSOP16
74HC237
A0 V
CC
A1 Y0
A2 Y1
LE Y2
E1 Y3
E2 Y4
Y7 Y5
GND Y6
001aab868
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
74HC237
A0 V
CC
A1 Y0
A2 Y1
LE Y2
E1 Y3
E2 Y4
Y7 Y5
GND Y6
001aan382
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15