Datasheet

74HC237 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 23 August 2012 2 of 17
NXP Semiconductors
74HC237
3-to-8 line decoder, demultiplexer with address latches
4. Functional diagram
Fig 1. Functional diagram
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Y0
Y1
Y2
3 TO 8
DECODER
INPUT
LATCHES
Y3
Y4
Y5
Y6
Y7
7
9
10
11
12
13
14
15
A0
A1
E1
E2
A2
LE
4
3
5
6
2
1
Fig 2. Logic symbol Fig 3. IEC logic symbol
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Y0
Y1
Y2
3 TO 8
DECODER
INPUT
LATCHES
Y3
Y4
Y5
Y6
Y7
7
9
10
11
12
13
14
15
A0
A1
E1
E2
5
6
A2
LE
4
3
2
1
001aab870
0
1
2
3
4
5
6
7
7
9
10
11
12
13
14
15
C8
8D,1
8D,2
X/Y
EN
&
2
8D,4
3
5
6
1
4
0
1
2
3
4
5
6
7
7
9
10
11
12
13
14
15
C8
0
8D,G
0
7
DX
&
2
2
3
5
6
1
4