Datasheet

74HC_HCT163 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3 — 2 June 2014 6 of 24
NXP Semiconductors
74HC163; 74HCT163
Presettable synchronous 4-bit binary counter; synchronous reset
7. Limiting values
[1] For DIP16 packages: above 70 C the value of P
tot
derates linearly at 12 mW/K.
For SO16 packages: above 70 C the value of P
tot
derates linearly at 8 mW/K.
For (T)SSOP16 packages: above 60 C the value of P
tot
derates linearly at 5.5 mW/K.
Sequence
reset outputs to zero; preset to binary 12; count to 13, 14, 15, zero, one and two; inhibit.
Fig 9. Typical timing sequence
DDD
 
FRXQWSUHVHWUHVHW LQKLELW
    
05
3
(
'
'
'
'
&3
&(3
&(7
4

4
4
4
7&
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +7.0 V
I
IK
input clamping current V
I
< 0.5 V or V
I
>V
CC
+ 0.5 V - 20 mA
I
OK
output clamping current V
O
< 0.5 V or V
O
> V
CC
+ 0.5 V - 20 mA
I
O
output current V
O
= 0.5 V to V
CC
+ 0.5 V - 25 mA
I
CC
supply current - 50 mA
I
GND
ground current 50 - mA
T
stg
storage temperature 65 +150 C
P
tot
total power dissipation DIP16 package
[1]
-750mW
SO16 package
[1]
-500mW
(T)SSOP16 package
[1]
-500mW