Datasheet

74HC_HCT163 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3 — 2 June 2014 4 of 24
NXP Semiconductors
74HC163; 74HCT163
Presettable synchronous 4-bit binary counter; synchronous reset
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 5. Pin configuration DIP16 Fig 6. Pin configuration SO16 Fig 7. Pin configuration TSSOP16
and SSOP16
3(
+&
+&7
0
5
9
&&
&
3
7&
'

'
'

4
'

4
'

4
&(3 &(7
*1'
DDD











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



0
5
9
&&
&
3
7&
'

'
'

4
'

4
'

4
&(3 &(7
*1' 3(
DDD


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





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



+&
+&7
+&
+&7
0
5
9
&&
&
3
7&
'

'
'

4
'

4
'

4
&(3 &(7
*1' 3(
DDD
















Table 2. Pin description
Symbol Pin Description
MR
1 synchronous master reset (active LOW)
CP 2 clock input (LOW-to-HIGH, edge triggered)
D0, D1, D2, D3 3, 4, 5, 6 data input
CEP 7 count enable input
GND 8 ground (0 V)
PE
9 parallel enable input (active LOW)
CET 10 count enable carry input
Q0, Q1, Q2, Q3 14, 13, 12, 11 flip-flop output
TC 15 terminal count output
V
CC
16 supply voltage