Datasheet

74HC_HCT132 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 30 August 2012 3 of 20
NXP Semiconductors
74HC132; 74HCT132
Quad 2-input NAND Schmitt trigger
6. Pinning information
6.1 Pinning
6.2 Pin description
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14
132
1A V
CC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y
mna406
1
2
3
4
5
6
7 8
10
9
12
11
14
13
Table 2. Pin description
Symbol Pin Description
1A to 4A 1, 4, 9, 12 data input
1B to 4B 2, 5, 10, 13 data input
1Y to 4Y 3, 6, 8, 11 data output
GND 7 ground (0 V)
V
CC
14 supply voltage
Table 3. Function table
[1]
Input Output
nA nB nY
LLH
LHH
HL H
HHL