User Manual

6 JN-DS-JN5142-x01-Myy 1v0 © NXP Laboratories UK 2012
4. Pin Configurations
1
2
3
4
16
ADC1
NC
NC
NC
NC
SPICLK
SPIMISO
SPIMOSI
SPISSZ
DIO0
DIO1
DIO2
SPISSM
SPISWP
DIO3
DIO4 DIO5 DIO6 DIO7 DIO8 DIO9
DIO10 DIO11
VDD
GND
VSSA
NC
ADC2
NC
NC
NC
NC
DIO17
DIO16
DIO15
RESETN
DIO14
DIO13
DIO12
5
6
7
8
9
10
11
12
13
14
15
17 18 19 20 21 22 23 24 25 26
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
NC
NC
Figure 1: Pin Configuration (top view)
Note that the same basic pin configuration applies for all module designs.