Data Sheet

© NXP Laboratories UK 2012 JN-DS-JN5142 1v0 7
1.3 Peripherals
The following peripherals are available on chip:
 Master SPI port with three select outputs
 UART with support for hardware or software flow control
 One programmable Timer/Counter which supports Pulse Width Modulation (PWM) and capture/compare, plus
three PWM timers which support PWM and Timer modes only.
 Two programmable Sleep Timers and a Tick Timer
 Two-wire serial interface (compatible with SMbus and I
2
C) supporting master and slave operation
 Eighteen digital I/O lines (multiplexed with peripherals such as timers and UARTs)
 8-bit, Analogue to Digital converter with up to four input channels
 Programmable analogue comparator
 Internal temperature sensor and battery monitor
 Two low power pulse counters
 Random number generator
 Watchdog Timer and Supply Voltage Monitor
 JTAG hardware debug port
User applications access the peripherals using the Integrated Peripherals API. This allows applications to use a
tested and easily understood view of the peripherals allowing rapid system development.