User Manual
Jennic
JennicJennic
Jennic
48 JN-DS-JN5139 v1.5 © Jennic 2008
16 Power Management and Sleep Modes
16.1 Operating Modes
Three operating modes are provided in the JN5139 that enable the system power consumption to be controlled
carefully to maximise battery life.
•
Active Processing Mode
•
Sleep Mode
•
Deep Sleep Mode
The variation in power consumption of the three modes is a result of having a series of power domains within the chip
that may be selectably powered on or off.
16.1.1 Power Domains
The JN5139 has the following power domains:
•
VDD Supply Domain: supplies the wake-up timers and controller, DIO blocks, Comparators and 32kHz RC
oscillator. This domain is driven from the external supply (battery) and is always powered. The wake-up timers
and controller, and the 32kHz RC oscillator may be powered on or off in sleep mode through software control.
•
Digital Logic Domain: supplies the SPI interface, CPU, ROM, Baseband controller, Modem and Encryption
processor. It is powered off during sleep mode.
•
Analogue Domain: supplies the ADC, DACs and the temperature sensor. It is powered off during sleep mode
and may be powered on or off in active processing mode through software control.
•
RAM Domain: supplies the RAM during sleep mode to retain the memory contents. It may be powered on or off
for sleep mode through software control.
•
Radio Domain: supplies the radio interface. It is powered during transmit and receive and controlled by the
baseband processor.
16.2 Active Processing Mode
Active processing mode in the JN5139 is where all of the application processing takes place. All of the peripherals
are available to the application as are options to actively enable or disable them to control power consumption; see
specific peripheral sections for details.
Whilst in Active processing mode there is the option to doze the CPU but keep the rest of the chip active; this is
particularly useful for radio transmit and receive operations, where the CPU operation is not required.
16.2.1 CPU Doze
Whilst in doze mode, CPU operation is stopped but the chip remains powered and the digital peripherals continue to
run. Doze mode is entered through software and is terminated by any interrupt request. Once the interrupt service
routine has been executed, normal program execution resumes. Doze mode uses more power than sleep and deep
sleep modes but requires less time to restart and can therefore be used as a low power alternative to an idle loop.
16.3 Sleep Mode
The JN5139 enters sleep mode through software control. In this mode many of the internal chip functions are
shutdown to save power, however the state of DIO pins are retained, including the output values and pull-up enables,
and this therefore preserves any interface to the outside world. The DAC outputs are placed into a high impedance
state.