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Camera subsystem

Introduction

The camera subsystem contains the complete imaging system for the main 5 megapixel AF camera and the

400X400 pixel front camera.

Key components

• DM500 Processor

Controls the 5 Mpixel AF main camera and the 400X400 pixel front camera (Image capture & Image Quality

enhancements).

Note: There is no non-volatile memory (Flash or ROM) for the DM500. Initialization code is passed

from the RapidoYawe at power up via the SPI interface. Further application code (self-test, image

capture, video capture) is transferred depending on the usage case.

Video and still image data is passed to the Rapido for display & storage after processing over a CCP bus

(CCP_CMT). Rapido provides the main clock, reset and wake up signals to DM500. The accelerator generates

an interrupt to the host itself. DM500 has internal 128Mbit DDR RAM for buffering captured image data &

code storage.

• Flash LED and Privacy LED

Camera flash LED and Privacy LED controlled from the DM500 via the ADP1653 AD driver. Driver has GPIOs

control for STROBE, ENABLE, FLASH_FAULT, ANALOG control for FLASH current (TX_MASK ) and I2C bus control

for configuring.

• 5 Mpixel Camera Module

The camera module is configured by the DM500 using I2C (I2C HIRES) control bus. It includes an EEPROM with

calibration values. Image data is transferred to the DM500 over a CCP balanced bus (HIRES_CCP). DM500 also

provides the generation of external clock for the camera (HIRES ExtClk).

• 400X400 Pixel Front Camera

The camera module (400X400 pixel module) is configured by the DM500 using I2C (I2C LORES) control bus.

Image data is transferred to the DM500 over a CCP balanced bus (LORES_CCP). DM500 also provides the

generation of external clock for the camera (LORES ExtClk).

• 3 Axis Accelerometer

The display orientation is provided by a 3 Axis ±2g/±8g (selectable range) accelerometer ( LIS3L02, STM). The

sensor generates an interrupt directly to Rapido host and communicates data by an I2C bus.

Powering

The camera subsystem is powered with discrete regulators (1V3, 1V8, 2V8 and 3V0). 1V3 is created by LP5952

LDO power supply, Vin is connected to 1V8 output. 1V8 is created by LM3677 SMPS power supply, Vin is

connected to VBAT. 2V8 and 3V0 are created by LP3985 LDO regulators, both with Vin connected to VBAT.

These supplies are turned off when the camera is not used with single GPIO controlled by Rapido host. The

LED driver (ADP1653) is supplied by the battery voltage Vbat.

RM-348; RM-349; RM-350

Camera troubleshooting

Issue 2 COMPANY CONFIDENTIAL Page 5 –5