User Guide

• Battery voltage monitoring
• 32.768 kHz clock with external crystal
• Real time clock with external backup battery
• SIM card interface
• Stereo audio codecs and amplifiers
• A/D converter
• Regulators
• Vibra interface
• Digital interface (CBUS)
EM ASIC N2300
EM ASIC N2300 includes the following functional blocks:
• Core supply generation
• Charge control circuitry
• Level shifter and regulator for USB/FBUS
• Current gauge for battery current measuring
• External LED driver control interface
• Digital interface (CBUS)
• Accessory supply voltage regulator
• Vout - accessory
Device memories
RAP memories NOR flash and SDRAM
The modem memory consists of 64 Mbit SDRAM and 64 Mbit NOR flash memories.
SDRAM is a dynamic memory for ISA (Intelligent Software Architecture) SW.
NOR is used for ISA SW code and PM data and CDSP (Cellular Digital Signal Processor) SW code.
Combo memory
The application memory of the device consists of NAND/DDR combo memory. The stacked DDR/NAND
application memory has 512 Mbit of DDR memory and 1024 Mbit of flash memory.
Audio concept
Audio HW architecture
The functional core of the audio hardware is built around two ASICs: RAP CMT engine ASIC and the mixed-
signal ASIC.
The mixed-signal ASIC provides an interface for the transducers and the accessory connector. Because audio
amplifiers are also integrated into the ASIC, the only discrete electronics components needed for audio paths
are audio filtering components and EMC/ESD components.
There are three audio transducers:
• 8 mm dynamic earpiece
• 16 mm dynamic speaker
• electret microphone module
RM-10;RM-24
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