User Guide

External LED SMPS is still controlled by EM ASIC N2300 PWM300 and powered by battery voltage.

System power-up

After inserting the main battery, regulators started by HW are enabled. SW checks, if there is some reason to

keep the power on. If not, the system is set to power off state by watchdog. Power up can be caused by the

following reasons:

• T0: Power key is pressed

• Charger is connected

• RTC alarm occurs

• MBUS wake-up

Clocking scheme

There are two main clocks in the system: a 38.4 MHz RF clock produced by VCTCXO in the RF section, and a

32.768 kHz sleep clock produced by EM ASIC N2200 with an external crystal.

The RF clock is generated only when VCTCXO is powered on by an N2200 regulator. The regulator itself is

activated by SleepX signals from both RAP and the application processor. When both CPUs are on sleep, the

RF clock is stopped.

The RF clock is used by RAP that then provides (divided) 19.2 MHz SysClk further to the application processor.

Both RAP and the application processor have internal PLLs, which then create clock signals for other peripheral

devices/interfaces like memory card, SIM, CCP, I2C and memories.

32k Sleep Clock is always powered on after startup. Sleep clock is used by RAP and the application processor

for low-power operation.

SMPS Clk is a 2.4 MHz clock line from RAP to EM ASIC N2300 used for switch mode regulator synchronizing in

the active mode. In the deep sleep mode, when VCTCXO is off, this signal is set to '0'-state.

BT Clk is a 38.4 MHz signal from a different BT/WLAN VCTCXO G6030 to the Bluetooth system.

CLK600 is a 600 kHz signal from N2300 to APE VCORE SMPS. The clock source is an internal RC oscillator in

N2300 (during the power-up sequence) or RAP SMPS Clk divided by 4 after the power-up sequence.

RM-208

Nokia Customer Care System Module

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