User Guide

ASICs
RAP ASIC
RAP ASIC is a 3G Radio Application Processor.
In general RAP consists of three separate parts:
• Processor subsystem (PSS) that includes the main processor and related functions
• MCU peripherals that are mainly controlled by MCU
• DSP peripherals that are mainly controlled by DSP
RAP core voltage (1.4 V) is generated from the EM ASIC (N2300) VCORE and I/O voltage (1.8 V) is from the EM
ASIC (N2200) VIO. The core voltage in sleep mode is 1.05 V.
EM ASIC N2200
EM ASIC N2200 includes the following functional blocks:
• Start up logic and reset control
• Charger detection
• Battery voltage monitoring
• 32.768 kHz clock with external crystal
• Real time clock with external backup battery
• SIM card interface
• Stereo audio codecs and amplifiers
• A/D converter
• Regulators
• Vibra interface
• Digital interface (CBUS)
EM ASIC N2300
EM ASIC N2300 includes the following functional blocks:
• Core supply generation
• Charge control circuitry
• Level shifter and regulator for USB/FBUS
• Current gauge for battery current measuring
• External LED driver control interface
• Digital interface (CBUS)
• Accessory supply voltage regulator
• Vout - accessory
Device memories
RAP memories NOR flash and SDRAM
The modem memory consists of 64 Mbit SDRAM and 64 Mbit NOR flash memories.
SDRAM is a dynamic memory for ISA (Intelligent Software Architecture) SW.
NOR is used for ISA SW code and PM data and CDSP (Cellular Digital Signal Processor) SW code.
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