User Guide

16-bit DDR-SDRAM interface consist of SDRAM controller from ARM and DCDL/DLLs. 16-bit muxed flash intreface

is implemented by using EMC module.

DDR-SDRAM core voltage (1.8V) is generated from Retu VDRAM and I/O voltage (1.8V) from VIO. NOR and NAND

flash uses VIO for both core and I/O voltages.

Actual interface speed is 58MHz for NOR flash, 117MHz for DDR-SDRAM and 39MHz for NAND flash.

Audio concept

Audio HW architecture

The functional core of the audio hardware is built around two ASICs: RAP engine ASIC and the mixed-signal

EM ASIC (N2200).

EM ASIC (N2200) provides an interface for the transducers and the accessory connector. Integrated hads free

speaker is driven by a D-class audio amplifier TPA2012D2.

There are three audio transducers:

• 7x11 mm dynamic earpiece

• 11x15 mm dynamic speaker

• electret microphone module

In addition to the audio transducers, EM ASIC (N2200) also provides an output for the dynamic vibra

component.

Internal microphone

Internal microphone is used for HandPortable (HP) and Internal HandsFree (IHF) call modes.

An analogue electret microphone is connected to N2200 Mic1P and Mic1N inputs via asymmetric electrical

connection.

The microphone is biased by N2200 MicB1 bias voltage output.

Figure 74 Internal microphone circuitry

External microphone

Galvanic accessories are connected to the system connector.

The accessory audio mode is automatically enabled/disabled during connection/disconnection of dedicated

phone accessories.

External microphone circuitry is biased by N2200 MicB2 bias voltage output. The circuitry provides a

symmetrical connection for the microphone from the system connector connections, XMICN and XMICP, to

N2200 inputs, Mic2P and Mic2N.

RM-170; RM-171

Nokia Customer Care System Module

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