User Guide

Nokia Customer Care Schematics / Layouts RAE-6/RA-4
Issue 1 12/04 Copyright © Nokia 2004. All rights reserved. Page 14
Signal overview
8) 12MHz clock at C4801
4) CBUSCLK at J2804
1) Sleepclock at J2802
7) SMPS clock at N101 pin 7
3) CBUSENX at J2806
10) SDRAMCLK at R4806
6) VSIM at X2700
22) TXC at J7508
23) TXP at J7507
13) HCLK at R4101
14) N2100 Sync at J2120
15) N2100 CLK at J2121
16) N2100 Dout at J2122
17) MMCCLK at R4807
18) CSX at D100 pin 1
19) SCL at D101 pin 1
20) SDA at D100 pin 3
11) BTCLK at R6044
12) DIN at J4100
9) Sleepclock at R4810
5) CBUSDATA at J2805
21) TX I/Q at J7509
24)RFBUSENA at J7504
25) RFBUSCLK at J7503
26) RFBUSDATA at J7502
Customer Care EMEA / Service & Support Readiness / Training Group
Copyright © 2004 NOKIA Only for training and service purposes
Page 14(16)
Version: 1.0 19.11.2004
9300 RAE-6
Board version: 1bc_10e
Signal overview Side 1
30) VC2 at C7604 (GSM1900 TX)
31) VC2 at C7604 (GSM1900 RX)
34) RX I/Q at J7500 & J7501
32) 942.4MHz at C7607 (GSM900 RX)
27) Iref900 at R7701
28) 3589.6MHz at R7512 (GSM900 TX)
33) 3769.6MHz at R7512 (GSM900 RX)
29) 897.4MHz at C7721 (GSM900 TX)
2) 26MHz RFCLK at C2902
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VR7=2.8V
VR6=2.8V
VR3=2.8V
VFLASH1=2.8V
VIO=1.8V
VREF1=1.35V
VR2=2.8V
VANA=2.8V
VCORE=1.35V