User Guide

PAMS
Technical Documentation
RAE-3
3. RF+System Module BL8
Page 3 – 32
issue 1 06/01
Figure 7. XIP Flash Vpp connection
D351
D352
D353
V
PP
VPP
VPP
15 16
X400
UI
Connector
D300
MADLinda
DSPGenOut2
Connection in UL8 Flex
XIP Flashes
SDRAM Memory
Synchronous DRAM is used as working memory and PDA display buffer
memory. MADLinda includes a separate 16 bit wide interface for SDRAM de-
vice. Interface supports also byte accesses. Supported memory clocking
speeds are 13MHz and 52MHz.
The SDRAM is 64Mbits (8Mbyte) 104MHz device in 52–pin CSP. Organisation
of the memory is 4Mx16 with byte accesses possibility. Nominal supply voltage
Vcc is 2.8V and it is supplied from the common VBB voltage.
SDRAM supports self refresh mode. This mode is used in Deep Sleep mode
when all clocks are off to preserve SDRAM data . All memory contents are lost
when memory is un–powered, so when battery is removed or battery voltage
drops under power off voltage.
Serial Flash Memory
Half of the Serial Flash memory is used as Flash file system memory (user
data). The other half is used to load parts of application code to serial Flash
(For running these applications are first copied to SDRAM). Serial interface to
memory is controlled by the Serial Flash interface block in MADLinda.
Used memory is 32Mbits (4Mbytes) SPI type Flash in 44 pin CSP package
(CBGA44). Page size is 528 bytes. Memory is powered from 2.8V VBB. Maxi-
mum used clock rate is 13MHz.