User Guide

PAMS
Technical Documentation
RAE-3
3. RF+System Module BL8
Page 3 – 30
issue 1 06/01
MADLinda
COBBA
CCONT

ExtSysResetX

SimCardRstX
LCDRSTX
PURX
CCONT
WATCHDOG
COBBARSTX
FLASH
FLRPX
UI conn.
(To CMT LCD
Controller)
SER FLASH
HAGARRSTX
HAGAR
(RF)
Figure 6. Board/Module level reset scheme
PURX resets the whole MADLinda. ExtSysResetX signal follows PURX activity
during reset. After reset this signal can be configured as IO and thus controlled
by SW with MPUGenOut8 control bit. The ExtSysResetX is connected to serial
Flash reset pin.
The LCD driver reset signal (LCDRSTX) is a MADLinda general purpose output
controlled by MPU SW.
Flash memory interface in Traffic Controller’s MEMIF block includes Flash re-
set/power down signal (FLRPX). FLRPX signal follows PURX activity during re-
set. After reset this signal can be controlled by MPU SW. Signal is connected to
XIP Flashes.
MADLinda’s SIM interface block generates the reset signal (SimCardRstX) for
the SIM. This signal is fed through CCONT, which makes any level shifting nec-
essary according to the voltage level of the SIM card in use.
COBBA_GJP reset signal (COBBARSTX) is DSPGenOut0 general purpose
output controlled by DSP SW. Reset state of the pin is LOW.
HAGAR reset signal (HAGARRSTX) is DSPGenOut1 general purpose output
controlled by DSP SW. Reset state of the pin is LOW.