PAMS Technical Documentation RAE-3 Series PDA 3. RF+System Module BL8 issue 1 06/01 Copyright 2001. Nokia Mobile Phones. All Rights Reserved.
PAMS RAE-3 3.
PAMS Technical Documentation RAE-3 3. RF+System Module BL8 CONTENTS –Troubleshooting Page No Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RAE-3 Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–6 3–9 RAE-3 Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . List of Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation External Audio Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Charger Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External RF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . POWER block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Use of CCONT ADC channels . . . . . . . . . . . . . . . . . . . . . . . AUDIO_RFI block . . . . . .
PAMS Technical Documentation RAE-3 3. RF+System Module BL8 VCTCXO, reference oscillator . . . . . . . . . . . . . . . . . . . . . . . . SHF PLL in HAGAR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCO module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Antenna . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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PAMS RAE-3 Technical Documentation HAGAR HF HSCSD HW IC ICE INL IO IR IrDA JTAG LCD LEAD LEAD2 LMM MAD MAD2 MAD2PR1 MAD2WD1 MADLinda MBUS MCU MFI MMC MMU MPU NTC PCI PCM PCR PDA PHF PLL PMM PPM PUP PWB PWM R&D RAM RF RFI ROM RTC SCU issue 1 06/01 3.
PAMS RAE-3 3. RF+System Module BL8 SCR SDRAM SIM SIMIF SIR SPI Spock SSR SUMMA SW TAP TI TVS UART USART UI UI1 VCTCXO VCXO VIA WD1 XIP (TBC) (TBD) Page 3 – 8 Technical Documentation System Configuration Register in MADLinda Synchronous Dynamic RAM Subscriber Identify Module Subscriber Identify Module Interface Serial Infrared (speed 115.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation RAE-3 Structure This document specifies the system HW part of RAE–3 GSM900/GSM1800 Dual Band Communicator. The BL8 module contains both the system hardware and the RF components. The system part of the BL8 module functions as a combined CMT baseband and PDA engine.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Technical Summary of System Part The RAE-3 system hardware is based on a special version of the DCT3 MAD2 ASIC called MADLinda. MADLinda carries out all the signal processing and operation controlling tasks of the phone as well as all PDA tasks. To be able to run simultaneously both CMT and PDA applications, MADLinda (ROM1) has a 52MHz ARM9 core.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation The interface from the system part and the RF and audio sections is handled by a specific ASIC COBBA_GJP. This ASIC provides A/D and D/A conversion of the in–phase and quadrature receive and transmit signal paths and also A/D and D/A conversions of received and transmitted audio signals. Data transmission between the COBBA_GJP and the MADLinda is implemented using serial connections. Digital speech processing is executed by the MADLinda ASIC.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Electrical Characteristics Power Supply Table 2. Operating voltages and power consumptions Name Parameter Min VIN Voltage 3.4 VBATT Voltage 3.0 Typ 3.6 Max Unit 18 V Charging voltage 4.8 V Voltage directly from main battery –to Vcore req. and RF part, 450 mA Notes typical for whole bl8 VB Voltage 3.0 3.6 4.8 V Filtered battery voltage – to VBB req. and to UI VB_CCONT Voltage 3.0 3.6 4.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 2. Name VCP Operating voltages and power consumptions (continued) Parameter Min Typ Max Unit Voltage 4.8 5.0 5.2 V 30 mA 1.523 V Reference voltage to COBBA_GJP and RF (VREF_2) (CCONT VREF) Current 150 A Available from CCONT, Current 36 A Consumption in system HW Current VREF Voltage 1.478 1.
PAMS RAE-3 3. RF+System Module BL8 Table 3. Electrical Technical Documentation characteristics of the system connector (X450) signals (continued) Pin Name Parameter 6 XMIC Input AC impedance Min Typ 2.2 Max. input signal Output DC level 7 1.47 Vpp 1.55 V Accessory muted (not for headset) Accessory unmuted 2.5 2.8 V 600 µA Output LOW 0 0.22*VBB V 2 mA 4.7 Series resistance to VBB Ω 270 0 0.3*VBB V Input HIGH 0.7*VBB VBB V Input LOW 0 0.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 4. Battery Connector (X100) Electrical Specifications Pin Name Min 3 BTEMP 0 0 4 BGND Typ (continued) Max Unit Notes 1.4 V Battery temperature indication Phone has 100k 5% pull–up resistor, Battery package has NTC pull down resistor: @+25C 47k 5%, B=4050 3% kW Fast power up (in production) V Battery ground – connected directly to system HW GND 1 0 0 Backup battery connector Table 5.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 7. SIM Connector (X101) Electrical Specifications Pin Signal Name SIM Contact Parameter Min RST (C2) Vout HIGH Vout HIGH Typ (continued) Max Unit Notes 4.0 VSIM V 5V SIM Card 2.8 VSIM V 3V SIM Card Type 2 SIMRST SIMCLK 0.4 V 3V/5V SIM Card Trise/Tfall 100 ns 3V/5V SIM Card Series Resistance O 1 Vout LOW CLK (C3) Vout HIGH 4.0 VSIM V 5V SIM Card Vout HIGH 2.8 VSIM V 3V SIM Card 0.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Infrared interface – IrDA and HP–SIR compatible – Data rates from 9600bits/s to 115kbits/s – Transmitter wavelength: min 880nm, max 900nm UI Signals Table 9. UI Connector Pin Signal Name From/To Parameter Minimum Type 27, 28, 29 VB Main battery 15 FLVPP Nominal 3.0 Maximum Unit 4.8 V VPROG not UI signal pins 15 and 16 connected in UL8 MADLinda (Prog_IO) pins 15 and 16 connected in UL8 17 VBB 2.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 9. UI Connector Pin Signal Name From/To Parameter (continued) Minimum Type 51 COL9 I/O 50 ROW0 I/O MADLinda (Prog_IO) (Refer to COL0) MADLinda (Prog IO) (Prog_IO) Output high ”1” Nominal 0.8*VBB V 0.22*VBB V Output current 2 mA 0.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 9. UI Connector Pin Signal Name From/To Parameter (continued) Minimum Type 11 GenSClk O MADLinda ((UIF), ), (and to CCONT) Output high ”1” 0.8*VBB O MADLinda (UIF) LCDEN O MADLinda (UIF) Output current 2 mA 0 Output high ”1” LCDPWM O MADLinda (PWM) MHz 200 W V Output low ”0” 0.22*VBB V Output current 2 mA Output high ”1” 0.8*VBB 0.22*VBB V Output current 2 mA 0.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 9. UI Connector Pin Signal Name From/To Parameter (continued) Minimum Type 13 KBLIGHTS O MADLinda (GPIO) Output high ”1” LCDDa0 O MADLinda (LCD) 24 38 20 36 37 22 19 23 39 7 2 40 LCDDa1 V 0.22*VBB V Output current 2 mA Output high ”1” Function Phone LCD & keyboard light control W 200 0.8*VBB V Output low ”0” 0.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 9. UI Connector Pin Signal Name From/To Parameter (continued) Minimum Type Nominal Series resistance 4 FSP O 3 DISPON O Output high ”1” MADLinda (LCD) LCDM O 0.8*VBB V 0.22*VBB V Output current 2 mA Frequency 51.6 Hz Series resistance 200 W 0.8*VBB 0.22*VBB V Output current 2 mA 0.8*VBB Output low ”0” EARP 0.22*VBB EARN 2 45, 46 SPKN V (Polarity change) mA Frequency 10.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 10. AC and DC Characteristics of signals between RF and System blocks (continued) Signal name From To Parameter Minimum Typical Maximum Unit Function VSYN_2 CCONT (VR3) HAGAR, VCO Voltage 2.7 2.8 2.85 V Supply voltage for dividers, LO buffers, prescalers and VCO (NO TAG) VCP CCONT (5V5) Charge pump regulator Voltage 4.8 5.0 5.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 10. AC and DC Characteristics of signals between RF and System blocks (continued) Signal name RXIP RXQP RXREF From HAGAR HAGAR COBBA_GJP To COBBA_GJP COBBA_GJP HAGAR Parameter Typical Maximum Unit Function Output level 300 1400 mVpp Input impedance 1 MW Single ended in–phase RX signal to baseband Input capacitance 8 pF Output level 300 Input impedance 1 MW Input capacitance 8 pF Output Voltage Minimum 1.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 10. AC and DC Characteristics of signals between RF and System blocks (continued) Signal name TXC From COBBA_GJP To Parameter Minimum HAGAR Voltage Min level Voltage Max level Typical Maximum Unit Function 0.12 0.18 V Transmitter power control voltage 2.27 2.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Functional Description Modes of Operation There are three main operation modes in the system when power is on: – Running – Idle – Deep Sleep Note that phone can be either on or off in each of power on states. Power OFF Too low Battery voltage or Battery removed Battery voltage high enough Reset Power Up Interrupt Interrupt Idle (VCXO ON) Running (VCXO ON) No tasks to run Deep Sleep (VCXO OFF) Deep Sleep conditions met Figure 3.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Other clock signals are generated inside MADLinda using PLLs and clock dividers which are controlled by SW. The maximum clock frequency in the MPU side is 52MHz and in the DSP side 78MHz. NO TAG shows the System HW clocking scheme. Power Control and Reset In normal operation the system HW is powered from the main battery. An external charger can recharge the battery while also supplying power to RAE-3.
VB PA MMC VPC (HAGAR) 3.0V LINEAR REG. IR LEDs Backlight Power Vacc Power Out 3.0V LINEAR REG. Audio Amp. VXOPWR PAMS VBATT BATTERY Technical Documentation issue 1 06/01 3.7V TXPA VB_CCONT VR 1 V2V VBB VR 2 VR 3 VR 4 VR 5 VR 6 VR 7 VSIM VREF V5V CCONT VXO 2.8V LINEAR REG. VB 1.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Power up When main battery is connected to device, powering on circuitry keeps CCONT PWRONX/WDDISX pin connected to ground through10kW resistor as long as CCONT releases the PURX reset signal. This activates the CCONT immediately when battery is connected. When the CCONT is activated, it switches on internal baseband and core regulators and generates a power up reset signal PURX for MADLinda.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation generated by CCONT. Note that Standard charger is not sold with RAE-3, but it is accepted. In performance charging concept (3–wire charger) a 32Hz PWM signal is fed to the charger (CHRG_CTRL in system connector). This high rate keeps the charging–current switch in CHAPS continuously connected. The PWM pulse width is controlled by the MPU in MADLinda which sends a control value to CCONT through a serial control data bus.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation HAGAR (RF) CCONT CCONT WATCHDOG HAGARRSTX SimCardRstX MADLinda COBBARSTX COBBA PURX ExtSysResetX SER FLASH LCDRSTX FLRPX UI conn. (To CMT LCD Controller) FLASH Figure 6. Board/Module level reset scheme PURX resets the whole MADLinda. ExtSysResetX signal follows PURX activity during reset. After reset this signal can be configured as IO and thus controlled by SW with MPUGenOut8 control bit.
PAMS RAE-3 Technical Documentation 3. RF+System Module BL8 System to interface In following chapters the blocks of system HW in SYSTEM part of BL8 schematics and functions related to each interface are described. The blocks include: CPU, MEMORIES, MMC, IRDA, UI, SYSCON, AUDIO_RFI and POWER. Component placement diagrams are in the A3 section.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Connection in UL8 Flex X400 UI Connector 15 16 D300 MADLinda DSPGenOut2 D351 VPP D352 VPP D353 VPP XIP Flashes Figure 7. XIP Flash Vpp connection SDRAM Memory Synchronous DRAM is used as working memory and PDA display buffer memory. MADLinda includes a separate 16 bit wide interface for SDRAM device. Interface supports also byte accesses. Supported memory clocking speeds are 13MHz and 52MHz.
PAMS RAE-3 Technical Documentation 3. RF+System Module BL8 MMC block Main components in MMC block are: – MMC connector (X001) – ESD protection zener array (V001) MultiMediaCard mode type serial interface to MultiMediaCard is controlled by the MMC interface block in MADLinda. The MMC interface includes two serial lines, command and data, and one clock line that is used to clock serial transfers in both lines. Used clock frequency is 13MHz. SPI mode MultiMediaCards are not supported in RAE-3.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Earpiece and HF Speaker lines Earpiece and speaker lines come from the AUDIO_RFI block. Battery removal signal BATT_REM signal comes from the battery removal switch.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation DCE_TX DCE_RX DTR GND Spring contacts to PWB L_GND DC_jack SGND VIN MBUS XEAR CHRG_CTRL XMIC Guiding and locking holes Figure 9. External RF with switch System Connector Serial connections Serial interface signals are MBUS (DCE_DCD) [MBUS], DCE_RX [AccTxData], DCE_TX [AccRxData] and DCE_DTR [DTR]. First name is the contact name in the system connector and in square brackets is given the signal name used in schematics.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Charger Interface Charger voltage input line V_IN is connected through 1.5A fuse (F450) to CHAPS (charger control) ASIC’s VCH inputs. Divided (47k/4k7) V_IN voltage level is connected to CCONT’s VCHAR ADC input. Charger controlling PWM output line, CHRG_CTRL, comes from CCONT’s PWM output (PWM_OUT). External RF External RF signal comes from RF section of BL8. RF connector in system connector includes switch for external/internal signal routing.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation VBACK from CHAPS is connected to CCONT only when the battery is installed to the connector X102. Backup battery is located on top of RF shield A501 and grounded through the shield. 2.0V reset device (D100) disconnects backup battery if it’s voltage drops too much. This prevents deep discharging which would permanently harm the backup battery. 3.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation AUDIO_RFI block The function of the AUDIO_RFI block is to interface between the digital world of the System Hardware and the analogue world of the audio and RF stages.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Audio amplifier IC (N201) is used to amplify the HF output signal of COBBA_GJP for the personal hands free speaker. Audio amplifier shut down mode is controlled with MADLinda’s MPUGenOut0 line. Because HF amplifier is powered from battery voltage, controlling of shut down is done through pull–down fet (V200). HeadDet and HookDet interrupting inputs in MADLinda are used to detect different audio accessories.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Introduction to RF of BL8 Maximum ratings Table 12. Maximum ratings of BL8 RF block Parameter Rating Max battery voltage (VBATT), idle mode 4.2 V Max battery voltage during call, highest power level 4.2 V Regulated supply voltages (VXO, VSYN_1, VSYN_2, VTX, VRX) 2.8 +/– 3% V PLL charge pump supply voltage (VCP) 4.8 +/– 0.2 V Voltage reference (VREF_2) 1.5 +/– 1.5% V Voltage reference (RXREF) 1.2 +/– 0.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation DC characteristics Regulators Transceiver includes a multi function power management IC (CCONT), which contains among other functions also 7 pcs of 2.8 V regulators. All regulators can be controlled individually with 2.8 V logic directly or through control register. The regulator IC is located in the system block of the transceiver. Use of the regulators is illustrated in the power distribution diagram Figure 12.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 14. Supply voltages Voltage source (continued) Supply name Load VREF_2 HAGAR (VB_EXT)–voltage ref. RXREF HAGAR (VREF_RX)–voltage ref. V5V VCP VCO, HAGAR (VCP) TXVGSM (HAGAR) Antenna switch GSM TXVDCS (HAGAR) Antenna switch DCS1800 TXVDET (HAGAR) Power detector Battery VBATT RF–regulators in CCONT, PA’s 4.7 V regulator in VCP line The function of the regulator is to be a DC switch.
1.76 A PA Vpc (Hagar) VXOENA SYNPWR VR 2 vrx VR VR VR 3 4 5 vsyn_2 vsyn_1 vtx 2 mA 6 mA VR 7 V5V vcp 20 mA LNA VCTCXO +buff. VR 6 COBBA analog 4V7 Reg VREF vref_2 HAGAR bias ref 20 mA VCO HAGAR RF–IC RX / TX parts PLL 1 mA TXP RAE-3 Page 3 – 43 RX: 53 mA TX: 100 mA 3. RF+System Module BL8 Figure 12. Power distribution diagram VR 1 vxo PAMS VBATT Technical Documentation BATTERY Power distribution diagram issue 1 06/01 3.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation RF characteristics Table 15. Main RF characteristics Item Values / E–GSM Values / DCS1800 Receive frequency range 925 ... 960 MHz 1805 ... 1880 MHz Transmit frequency range 880 ... 915 MHz 1710 ... 1785 MHz Duplex spacing 45 MHz 95 MHz Channel spacing 200 kHz 200 kHz 174 374 Power class 4 1 Number of power levels 15 16 Number of RF channels Transmitter characteristics Table 16.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 18. Output power requirements / DCS1800 (continued) Parameter Min. Typ. Max. Unit / Notes Output power tolerance / power levels 9...13, (12 ... 4 dBm) +/– 4.0 +/– 5.0 dB, normal cond. dB, extreme cond. Output power tolerance / power levels 14 and 15, (2 and 0dBm) +/– 5.0 +/– 6.0 dB, normal cond. dB, extreme cond. Output power control step size 0.5 2.0 3.5 dB Output power is measured from the external antenna connector.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Functional descriptions RF block diagram The block diagram of the direct conversion transceiver architecture used in bl8 is shown in Figure 13. The architecture contains one RF ASIC (HAGAR), dual– band PA module, VCO and VCTCXO modules, RF filters for TX and RX, and discrete LNA stages for both receive bands.
PAMS RAE-3 TXIP TXIN TXQP TXQN 13 MHz to ASIC VCXO TXC AFC 26 MHz to ASIC SHF VCO SERIAL CTRL BUS PLL f/2 f EGSM ANT SW PCN EGSM Dual PA Buffer Diplexer EGSM SAW EGSM PCN f/2 HAGAR f/2 f f f/2 f f f/2 VREF_2 1.5 V BIAS RXREF 1.2 V RXQ RXI TXP 3. RF+System Module BL8 Technical Documentation PCN External antenna (car kit) Internal antenna Mechanical switch Figure 13.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Frequency synthesizer VCO frequency is locked with PLL into stable frequency source, which is a VCTCXO–module . The VCTCXO is running at 26 MHz. The residual temperature, drift, Doppler and initial inaccuracy effects are compensated with AFC ( automatic frequency control ) voltage.
PAMS RAE-3 Technical Documentation 3. RF+System Module BL8 The final amplification is realized with dual–band power amplifier. It has one 50 ohm input and two 50 ohm outputs. PA is able to produce over 3 W (4.5 dBm input level) in EGSM band and over 1.5 W (6 dBm input level) in DCS1800 band into 50 ohm output . Power control circuitry consists of discrete power detector (common for EGSM and DCS1800) and error amplifier in HAGAR.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Antenna switch SWITCH (SW_1, SW_2) Table 20. Electrical specification Parameter Min. Terminating impedance Typ. Max. 50 VSWR Unit ohm 1.8 Permissible input power 3.0 PEAK 2.4 2.8 V 0.2 V Control current (TX–mode) 10 mA (RX–mode) 10 uA Max. Unit Control voltage : HI LO 2,7 W 0 TX–FILTERS Table 21. TX_1 to ANT Electrical specifications Parameter Min. Passband Terminating impedance Typ.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 24. ANT to RX_2 Electrical specifications Parameter Min. Passband Typ. 1805 Terminating impedance Max. Unit 1880 MHz 50 VSWR, RX_2 and ANT (1805...1880 MHz) ohm 2.0 Permissible input power 11 dBm Receiver blocks RX EGSM900/DCS1800 DUALBAND SAW FILTER Unbalanced inputs and outputs Table 25. Electrical specifications Parameter Min. Typ. Max. Unit Filter 1 (from input 1 to output 1) Passband 925 – 960 Insertion loss 2.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation DCS1800 Pre–amplifier (LNA) Table 27. DCS1800 Pre–amplifier specifications Parameter Min. Typ. Frequency band Max. 1805 – 1880 Supply voltage 2.4 MHz 2.85 Current consumption 6.5 V mA Input VSWR 1.2 1.6 Output VSWR 2.9 3.3 Gain step Unit/Notes 32 dB, room temp. GSM/PCN IC (Hagar), RX part Table 28. GSM/PCN IC RX part Specification Parameter Supply voltage Minimum Typical Maximum Unit / Notes 2.7 2.78 2.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Transmitter blocks IQ–modulator and TX–AGC in HAGAR IC Table 29. Total Transmitter Parameters (GSM/PCN) Parameters Min Typ Max Units Supply Voltages (OC–output) 2.7 2.78 2.86 Volts Output Frequency GSM 880 915 MHz Output Frequency PCN 1710 1785 MHz Linear Output Power, 100 ohm load, GSM * 4 dBm Linear Output Power, 100 ohm load, PCN * 3 dBm Table 30.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Diplexer Table 32. Electrical specifiations Parameter Min. Typ. Max. Unit MHz Frequency range GSM input 880 915 Frequency range PCN input 1750 1785 Input impedance 50 ohm Output impedance 50 ohm Input power 5 VSWR all ports dBm 1.65 TX–buffer and 3dB attenuator Table 33. Electrical specifiations Parameter Min. Frequency range Typ. 880 Max.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 35. Max. ratings, GSM (continued) Parameter Symbol Min Typ Max Unit Input impedance Zin 50 ohm Output impedance Zout 50 ohm Input power Pin 3 dBm Output power Pout(1) 35 36 dBm Output power Pout(2) 33.6 Control voltage range Vpctrl 0.2 dBm 2.2 Input VSWR dB 3.5 Table 36. Max. ratings, PCN Parameter Symbol Operating freq. range: Supply voltage Min Typ 1710 Vcc 3.1 3.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Power detector Table 38. Power detector specifications Parameter Min. Typ. Max. Unit/Notes 2.7 2.8 2.85 V 2.0 mA 2.2 V Supply voltage Supply current Output voltage 0.1 Load resistance 10 kohm Synthesizer blocks VCTCXO, reference oscillator The VCTCXO is the reference oscillator for the SHF synthesizer. It also generates reference clock signal for the digital parts in the system blocks.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation VCO module Table 41. Parameter Electrical specifications, Zo=50 ohm Conditions Supply voltage, Vcc Rating Unit/ Notes 2.7 +/– 0.1 V < 20 mA Supply current, Icc Vcc = 2.8 V, Vc = 2.25 V Control voltage, Vc Vcc = 2.55...2.85 V 0.8... 3.7 V Output power level Vcc = 2.5 V f = 3420...3840 MHz >–3 min. dBm Output impedance and VSWR f = 3420...
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Connections Antenna One common antenna resonating on both bands is used. The antenna is located in the cover part. The RF connection between the bl8 module and the antenna is a coaxial cable. RF connector and antenna switch There are two antenna connectors in bl8 module. One is the connector for external (car kit) antenna and it has an integrated mechanical switch function. This connector is integrated with the system connector.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 44. AC and DC Characteristics of signals between RF and System blocks Signal name VBATT From Battery To PA Parameter Voltage Minimum Typical Maximum Unit 3.1 3.7 4.8 V 3500 mA 1.523 V 150 uA 2.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 44. AC and DC Characteristics of signals between RF and System blocks (continued) Signal name TXP From MADLind da To HAGAR Parameter Minimum Typical RFC RXIP COBBA VCTCXO HAGAR VCTCXO MADLind da COBBA 2.0 2.85 V Logic low ”0” 0 0.5 V Load Resistance 10 220 kohm 20 pF 2.254 V Voltage 0.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Table 44. AC and DC Characteristics of signals between RF and System blocks (continued) Signal name TXIP/ TXIN From COBBA To HAGAR Parameter Minimum Typical Maximum Unit Function Differential voltage swing (x0.75) 1.226 1.32 1.416 Vpp DC level 1.165 1.2 1.235 V Differential offset voltage (corrected) +/–2.0 mV Differential in–phase TX baseband signal f the th TX I/Q modd for ulator.
PAMS RAE-3 3. RF+System Module BL8 Technical Documentation Timings Transmit power Timing one burst 542.8 us or two bursts Pout TXC TXP Modulator power unknown min 340us Control writings 4 1 3 7 5 Figure 14. Transmitter control timing diagram for all kind of TX bursts Synthesizer clocking Synthesizers are controlled via serial control bus, which consists of SDATA, SCLK and SENA1 signals. These lines form a synchronous data transfer line. SDATA is for the data bits, SCLK is 3.
