User Guide

PAMS
Technical Documentation
RAE–2
BS1
Page 5 – 32
Section 02/99
Table 16. Testpoints
(continued)
Description /
Note
UnitMaxNomMinFunctionNameI/OPoint
J451 STS1 XIP1 flash status
2.4 2.80 2.85 VDC High
0 0.4 VDC Low
J452 STS2 XIP2 flash status
2.4 2.80 2.85 VDC High
0 0.4 VDC Low
J453 SD1 System data bus line 1
2.3 2.80 2.85 VDC High, data to
memory
0 0.45 VDC Low, data to
memory
2.4 2.8 2.85 VDC High, data to
CPU
0 0.4 VDC Low, data to
CPU
J454 SA4 System address bus line 4
2.3 2.80 2.85 VDC High
0 0.45 VDC Low
J455 D0 Memory data bus line 0
2.3 2.80 2.85 VDC High
0 0.45 VDC Low
J456 MA3 Memory address bus line 3
2.3 2.80 2.85 VDC High
0 0.45 VDC Low
J497 VCOMP1 1.24 1.285 VDC
J498 CS3x Phaser chip select
2.3 2.80 2.85 VDC High
0 0.4 VDC Low, chip se-
lected
J499 RESETx Reset from Phaser to CPU
dfl h i
2.5 2.80 2.85 VDC High
an
d
fl
as
h
memor
i
es
0 0.5 VDC Low
J801 O GENSDIO CMT LCD and CCONT serial
dt
2.0 2.80 2.85 VDC High
d
ata
0 0.5 VDC Low
J803 I/O LCDCD CMT LCD command / data
lt
2.0 2.80 2.85 VDC High, data
se
l
ect
0 0.6 VDC Low, command
J804 I/O LCDCSx CMT LCD chip select
2.1 2.80 2.85 VDC High
0 0.5 VDC Low, chip se-
lected
J808 O SCK PDA LCD data clock 2.3 2.80 2.85 VDC High
J854 BZR_IF Buzzer signal
2.0 2.80 2.85 VDC High
0 0.6 VDC Low
J880 HFENA Handsfree earpiece enable
2.3 2.80 2.85 VDC High, HF ampli-
fied enabled
0 0.45 VDC Low, HF ampli-
fied disabled
J881 O XEAR Audio output for handsfree
use
2.0 Vpp