PAMS Technical Documentation NSB-8 Series Transceivers System Module & UI Issue 1 01/02 ãNokia Corporation
NSB-8 System Module & UI PAMS Technical Documentation Table of Contents Transceiver NSB-8......................................................................................................... 4 Introduction ..................................................................................................................4 Electrical Modules..................................................................................................... 4 Operation Modes ..............................................
PAMS Technical Documentation NSB-8 System Module & UI List of Figures Page No Fig 1 Baseband Block Diagram ...........................................................................................7 Fig 2 BLB-2 battery pack pin order.....................................................................................21 Fig 3 UPP & UEM SIM connections...................................................................................24 Fig 4 Microphone connection ...........................................
NSB-8 System Module & UI PAMS Technical Documentation Transceiver NSB-8 Introduction The NSB-8 is a single band radio transceiver unit for GSM1900 networks. The GSM1900 power class is 1. It is a true 3 V transceiver, with an internal antenna and vibra. The transceiver has a full graphic display and the user interface is based on a Jack style UI with two soft keys. An internal antenna is used, there is no connection to an external antenna.
NSB-8 System Module & UI PAMS Technical Documentation In the power off mode circuits are powered down and only sleep clock is running. In the idle mode only the circuits needed for power up are supplied. In the active mode all the circuits are supplied with power although some parts might be in the idle state part of the time. The charge mode is effective in parallel with all previous modes. The charge mode itself consists of two different states, i.e. the fast charge and the maintenance mode.
NSB-8 System Module & UI PAMS Technical Documentation System Module RM8 Baseband Module The baseband architecture supports a power saving function called "sleep mode". This sleep mode shuts off the VCTCXO, which is used as system clock source for both RF and baseband. During the sleep mode the system runs from a 32 kHz crystal. The phone is waken up by a timer running from this 32 kHz clock supply. The sleep time is determined by network parameters.
NSB-8 System Module & UI PAMS Technical Documentation Block Diagram Figure 1: Baseband Block Diagram LNA ANTENNA SWITCH VR7 2.7 V PA VR3 2.7 V VCTXO DIV/2 VCO SYNTHE DIV/4/2 DIV/4/2 HAGAR uBGA 80 BIAS LOW POWER MODE BUZZER SC RF CRC FILTER FILTER CONVERTERS RF REFERENCES VFLASH1 2.7 V VIO 1.8 V FLASH 10 BIT ADC 9K6...1M15 OSC RC 32kHz OSC A/D INPUTS (14x14) (0.8 mm) FBUS CHARGE SWITCH & CONTROL CHARGER 32kHz VBAT 3.1 ... 4.
NSB-8 System Module & UI PAMS Technical Documentation UPP ASIC (Universal Phone Processor) provides the MCU, DSP, external memory interface and digital control functions. UEM ASIC (Universal Energy Management) contains power supply circuitry, charging, audio processing and RF control hardware. Technical Summary Baseband is running from power rails 2.8 V analog voltage and 1.8 V I/O voltage. UPP core voltage Vcore can be lowered down to 1.0 V, 1.3 V and 1.5 V.
NSB-8 System Module & UI PAMS Technical Documentation DC Characteristics Regulators and Supply Voltage Ranges Table 1: Battery voltage range Signal Min. Nom Max Note VBAT 3.1V 3.6V 4.2V (charging high limit voltage) 3.1 V SW cut off Table 2: BB Regulators Signal Min. Nom Max Note VANA 2.70V 2.78V 2.86V Imax = 80mA VFLASH1 2.70V 2.78V 2.86V Imax = 70mA ISleep = 1.5mA VSIM VIO 1.745V 1.8V 1.855V Imax = 25mA 2.91V 3.0V 3.09V ISleep = 0.5mA 1.72V 1.8V 1.
NSB-8 System Module & UI PAMS Technical Documentation External and Internal Signals and Connections This section describes the external and internal electrical connection and interface levels on the baseband. The electrical interface specifications are collected into tables that covers a connector or a defined interface. Internal Signals and Connections Table 4: Internal microphone Signal Min. Nom MICP MICN Max. Condition Note 200mVpp AC 2.2kΩ to MIC1B 2.0 V 2.1 V 2.25 V DC 2.0V 2.1V 2.
NSB-8 System Module & UI PAMS Technical Documentation Table 6: AC and DC characteristics of RF-BB voltage supplies Signal name VR2 From UEM To VRF_TX Parameter Min. Type Max 2.70 2.78 2.86 V 65 100 mA 120 nVrm s/ sqrt( Hz) 2.78 2.86 V 1 20 mA 240 nVrm s/ sqrt( Hz) 2.86 V Current 50 mA Noise density f = 6 Hz f = 60 Hz f y 600Hz 5500 550 55 nVrm s/ sqrt( Hz) 2.86 V Current 50 mA Noise density BW=100Hz... 100kHz 240 nVrm s/ sqrt( Hz) 2.
NSB-8 System Module & UI PAMS Technical Documentation Table 6: AC and DC characteristics of RF-BB voltage supplies Signal name VrefRF 01 From To UEM Parameter VREF_ RX Min. Voltage 1.334 Type Max 1.35 1.36 6 V 100 uA +65 uV/C 60 nVrm s/ sqrt( Hz) Note: Below 600Hz noise density is allowed to increase 20 dB/oct 1.37 7 V 100 uA Supply for RF-BB digital interface and some digital parts of RF. +65 uV/C 350 nVrm s/ sqrt( Hz) Current Temp Coef -65 Noise density BW=600Hz...
NSB-8 System Module & UI PAMS Technical Documentation Table 7: AC and DC characteristics if RF-BB signals Input characteristics Signal name From To Parameter Type Min RFBusClk RESET (GENIO6) UPP RF-IC UPP Max Function Unit "1" 1.38 1.88 V "0" 0 0.4 V Load resistance 10 220 kohm Load capacitance 20 pF Data frequency 10 MHz RF-IC RFbus clock "1" 1.38 1.85 V "0" 0 0.
NSB-8 System Module & UI PAMS Technical Documentation Table 8: AC and DC characteristicsof RF-BB signals Signal name TXIP / TXIN From UEM To Parameter RF-IC Min. Differential voltage swing (static) 2.23 DC level 1.17 Type 1.20 Source Impedance TXQP / TXQN UEM RF-IC AFC UEM VCTCX O UEM RF Voltage Min. Max 0.0 2.4 Resolution 11 Load resistance and capacitance 1 Voltage Min. Max Resolution Temp Coef Vbase Page 14 RF UEM UEM Vpp 1.23 V 200 ohm V 100 kohm nF 0.
NSB-8 System Module & UI PAMS Technical Documentation External Signals and Connections UI (board-to-board) connector Table 9: UI (board-to-board) connector Pin Signal Min. Nom Max Condition 2.7V 1.0V Note 1 SLOWAD(2) 1.5V 0.1V 2 VBAT 3.0V 3 ROW(4) 0.7xVIO 0 1.8V 0.3xVIO High Low Keyboard matrix row 4 4 ROW(3) 0.7xVIO 0 VIO 0.3xVIO High Low Keyboard matrix row 3 5 COL(2) 0.7xVIO 0 VIO 0.3xVIO High Low Keyboard matrix column 2 6 ROW(2) 0.7xVIO 0 VIO 0.
NSB-8 System Module & UI PAMS Technical Documentation Table 10: LCD connector Pin 2 Signal XCS 3 GND 4 SDA 5 6 7 8 Page 16 SCLK Min. 0.8*VIO 0 Max Condition VIO 0.22*VIO Note Logic '1' Logic '0' Chip select Active low 130ns tcss XCS low before SCLK rising edge 130ns tcsh XCS low after SCLK rising edge 300ns tcsw XCS high pulse width 0V 0.8*VIO 0 VIO 0.22*VIO Logic '1' Logic '0' Serial data (driver input) 0.7*VIO 0 VIO 0.
NSB-8 System Module & UI PAMS Technical Documentation DC connector Table 11: DC connector Pin Signal 2 VCHAR 1 CHGND Min Nom 7.0 VRMS Max 8.4 VRMS Condition 9.2 VRMS 850 mA Note Fast charger Charger positive input 0 Charger ground Headset connector Table 12: Headset connector Pin Signal 5 Min Nom XMICP 2.0 V 3 4 7 Max 1Vpp G = 0dB 100 mVpp G = 20dB 2.25 V DC 1Vpp G = 0 dB 100 mVpp G = 20dB 0.85V DC 1Vpp AC 0.85V DC 1Vpp AC 2.1 V XMICN XEARN XEARP 0.75V 0.
NSB-8 System Module & UI PAMS Technical Documentation Table 13: SIM connector Pin Name 3 4 SIMCLK DATA 5 NC 6 GND Page 18 Parameter Min Frequency Type Max Unit 3.25 Trise/Tfall MHz 50 ns V 1.8V Voh 1.8V Vol 0.9xVSIM 0 VSIM 3 Voh 3 Vol 0.9xVSIM 0 VSIM 1.8V Voh 1.8V Vol 0.9xVSIM 0 VSIM 0.15xVSIM 3 Voh 3 Vol 0.9xVSIM 0 VSIM 0.15xVSIM 1.8V Vih 1.8V Vil 0.7xVSIM 0 VSIM 0.15xVSIM 3V Vil 3V Vil 0.7xVSIM 0 VSIM 0.
PAMS Technical Documentation NSB-8 System Module & UI Functional Description Modes of Operation RM8 baseband engine has five operating modes: No supply • • • • • No supply Acting Dead Active Sleep Charging In NO_SUPPLY mode the phone has no supply voltage. This mode is due to disconnection of battery or low battery voltage level. Phone is exiting from NO_SUPPLY mode when sufficient battery voltage level is detected.
NSB-8 System Module & UI PAMS Technical Documentation nection etc. In sleep mode VCTCXO is shut down and 32 kHz sleep clock oscillator is used as reference clock for the baseband. Charging The battery voltage, temperature, size and current are measured by the UEM controlled by the charging software running in the UPP. The charging control circuitry (CHACON) inside the UEM controls the charging current delivered from the charger to the battery.
NSB-8 System Module & UI PAMS Technical Documentation Table 15: Pin numbering of battery pack Signal name Pin number Function VBAT 1 Positive battery terminal BSI 2 Battery capacity measurement (fixed resistor inside the battery pack) BTEMP 3 Battery temperature measurement (measured by NTC resistor inside pack) GND 4 Negative/common battery terminal Figure 2: BLB-2 battery pack pin order 4(GND) 3(BTEMP) 2(BSI) 1 (+) Power Up and Reset Power up and reset is controlled by the UEM ASIC.
NSB-8 System Module & UI PAMS Technical Documentation A/D Channels The UEM contains the following A/D converter channels that are used for several measurement purpose. The general slow A/D converter is a 10 bit converter using the UEM interface clock for the conversion. An interrupt will be given at the end of the measurement.
NSB-8 System Module & UI PAMS Technical Documentation SIM Interface UEM contains the SIM interface logic level shifting. SIM interface can be programmed to support 3 V and 1.8 V SIMs. SIM supply voltage is selected by a register in the UEM. It is only allowed to change the SIM supply voltage when the SIM IF is powered down. The SIM power up/down sequence is generated in the UEM. This means that the UEM generates the RST signal to the SIM. Also the SIMCardDet signal is connected to UEM.
NSB-8 System Module & UI PAMS Technical Documentation Figure 3: UPP & UEM SIM connections. GND GND SIM SIMDATA C5 C6 C7 C8 C1 C2 C3 C4 SIMCLK SIMIO SIMIO SIMClk SIMClk Data Data SIMRST VSIM UEM UPP SIMIF register UIF Block UEM digital logic From Battery Type contact BSI UEMInt CBusDa CBusEnX CBusClk From SIM Card contact SIMCardDet The internal clock frequency from UPP CTSI block is 13 MHz in GSM. Thus to achieve the minimum starting SIMCardClk rate of 3.
NSB-8 System Module & UI PAMS Technical Documentation Figure 4: Microphone connection UEM 10pF 100nF MIC1B MIC1N 33nF 2k2 2k2 33nF 2k2 600ohm@100MHz MIC1P 10pF 10pF UPP UPP (Universal Phone Processor) is the digital ASIC of the baseband. UPP includes 8 MBit internal RAM, ARM7 Thump 16/32-bit RISC MCU core, LEAD3 16-bit DSP core, ROM for MCU boot code and all digital control logic.
NSB-8 System Module & UI PAMS Technical Documentation memory interface. For program memory 8 Mbit (512 x 16 bit) PDRAM is integrated. RAM block can also be used as data memory and it is byte addressable. RAM is mainly for MCU purposes but also DSP has also access to it if needed. MCU code is stored into external flash memory. Size of the flash is 64 Mbit (4096 x 16 bit) The NSB-8 baseband supports a burst mode flash with multiplexed address/data bus.
PAMS Technical Documentation NSB-8 System Module & UI RF Module This RF module takes care of all RF functions of the engine. RF circuitry is located on one side (B-side) of the 8-layer PWB. The PWB area for the RF circuit is about 17 cm². EMC leakage is prevented by using a metal B-shield, which screens the whole RF side of the engine. The conductive silicon gasket is used between the PWB and the shield. The metal B-shield is separated into three blocks.
NSB-8 System Module & UI PAMS Technical Documentation DC characteristics Regulators Transceiver has a multifunction power management IC on baseband section, which contains among other functions; 7 pcs of 2.78 V regulators and 4.8V up-switcher for charge pump. All regulators can be controlled individually with 2.78 V logic directly or through control register. In GSM direct controls are used to get fast switching, because regulators are used to enable RF-functions.
NSB-8 System Module & UI PAMS Technical Documentation Figure 6: Power Distribution Diagram SOURCE VR1 VR2 VR3 LOAD 4.75 V +/- 3.2 % Charge pump in HAGAR 10 mA 2.78 V +/- 3 % 100 mA 2.78 V +/- 3 % 20 mA TX IQ modulator, power control opamp in Hagar VCTCXO VCTCXO buffer in Hagar VR4 2.78 V +/- 3 % 50 mA GSM 1900 LNA RX mixer in Hagar DTOS in Hagar VR5 2.78 V +/- 3 % 50 mA PLL in Hagar Dividers in Hagar LO buffers in Hagar UEM Prescaler in Hagar Power detector VR6 2.
NSB-8 System Module & UI PAMS Technical Documentation RF characteristics Table 17: Main RF characteristics Item Values (GSM1900) Receive frequency range 1930.2...1989.8 MHz Transmit frequency range 1850...1909.
NSB-8 System Module & UI PAMS Technical Documentation Table 19: Receiver characteristics Item Values (GSM1900) Typical AGC step in LNA 30 dB Usable input dynamic range -102... -10 dBm RSSI dynamic range -110... -48 dBm Compensated gain variation in receiving band +/- 1.0 dB Figure 7: RF Block Diagram Frequency synthesizers VCO frequency is locked with PLL into stable frequency source, which is a VCTCXO-module (voltage controlled temperature compensated crystal oscillator).
NSB-8 System Module & UI PAMS Technical Documentation Figure 8: Frequency synthesizers freq. reference AFC-controlled VCTCXO R LP f ref f_out / M PHASE CHARGE DET. PUMP f_out VCO Kd Kvco M M = A(P+1) + (N-A)P= = NP+A PLL is located in HAGAR RF-IC and is controlled via serial RFBus. There is 64/65 (P/P+1) prescaler, N- and A-divider, reference divider, phase detector and charge pump for the external loop filter.
PAMS Technical Documentation NSB-8 System Module & UI Discrete LNA have three gain levels. The first one is max. gain, the second one is about 30dB below max. gain and the last one is off state. The gain selection control of LNA comes from HAGAR IC. Differential RX signal is amplified and mixed directly down to BB frequency in HAGAR. Local Oscillator signal is generated by an external VCO. The VCO signal is divided by 2. PLL and dividers are in HAGAR IC.
NSB-8 System Module & UI PAMS Technical Documentation Transmitter Transmitter chain consists of a final frequency IQ-modulator, a single band power amplifier and a power control loop. I- and Q-signals are generated by baseband. After post filtering (RC network) the signals are modulated by IQ-modulator in HAGAR IC. The LO signal for modulator is generated by a VCO and is divided by 2. After modulator the TX signal is amplified and buffered. HAGAR TX output level is +3 dBm minimum.
PAMS Technical Documentation NSB-8 System Module & UI Settling time requirement comes also from the start up-time allowed. When transceiver is in sleep mode and "wakes" up to receive mode, there is only about 5 ms for the AFCvoltage to settle. When the first burst comes in system clock has to be settled into +/0.1 ppm frequency accuracy. The VCTCXO-module requires also 5 ms to settle into final frequency. Amplitude rises into full swing in 1...
NSB-8 System Module & UI PAMS Technical Documentation UI Board LK5 NSB-8 consists of separate UI board, named as LK5, which includes contacts for the keypad domes and LEDs for keypad illumination. UI board is connected to main PWB through 16 pole board-to-board connector with springs. Signals of the connector are described in section External and Internal Signals and Connections. 5x4 matrix keyboard is used in NSB-8. Key pressing is detected by scanning procedure.
NSB-8 System Module & UI PAMS Technical Documentation Internal Speaker The internal earpiece is a dynamic earpiece with an impedance of 32 ohms. The earpiece is low impedance one since the sound pressure is to be generated using current and not voltage as the supply voltage is restricted to 2.7 V. The earpiece is driven directly by the UEM. The ear piece driver in UEM is a bridge amplifier.
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