User Guide

NSD-5
3. System Module PAMS Technical Documentation
Page 22 Nokia Corporation Issue 1 05/02
Figure 11: MAD/CAFE interface diagram
General Description
As shown in Figure 11, the interface between MAD4 and CAFE consists of a parallel
transmit bus (TxD), parallel receive bus (RxD) data, two serial data paths for both CAFE
control and CODEC audio transmit/receive data, and an 8 kHz frame sync for the serial
data bus.
The interface also includes the system clock and other required clocks. CAFE provides
MAD4 19.2 MHz system clock (CLK19M20) and the 9.8304 MHz CDMA clock (CLK9M83).
MAD4 creates internal clocks from the system clock. The 8 kHz sync signal is 320 kHz
period wide pulse (serial data interface rate). All data transmission and reception in the
MAD ASIC will be clocked in/out with the rising edge of the clocks and all data transmis-
sion and reception in CAFE will be clocked in/out with the falling edge of the clocks.
MAD4 also supplies CAFE with an active “low” power reset signal (mdResetX).
Signal Parameter Min Typical Max Function
CAFESIO(0)
“1” (V)
“0” (V)
T
SDOD
2.24
0
2.70
0.30
Vbb
0.62
20 ns
MAD to CAFE serial data for
CAFE control, and digitized rre-
ceived audio data to CODEC
CAFESIO(1)
“1” (V)
“0” (V)
T
SD1H
T
SDISU
2.24
0
20 ns
20 ns
2.70
0.30
Vbb
0.62
CAFE to MAD serial data bus to
read CAFE control register data
and send digitized audio data to
MCD