User Guide

PAMS Technical Documentation 3. System Module
NSD-5
Issue 1 05/02 Nokia Corporation Page 13
Table 1: Electrical characteristics of the external memory interface
Functional Timing Parameters
Memory access timing is treated asynchronously. There are two reasons for this type of
access. First, the external memories are inherently asynchronous. Second, two separate
processors running at different frequencies share the memories.
The following two figures (Figure 5 and Figure 6) provide timing information on MAD4
memory access. See MAD4 Technical Specifications (Reference 1) and DCT3 MAD4
Resource Manager Specification and Implementation (Reference 2) for additional timing
information on external memory read/write cycles.
Figure 5: External memory write cycle
EEPROMSCLK < 0.62 > 2.24 EEPROM serial data clock
Signal
Level (V)
Low High
Functional description