User Guide
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5
Issue 1 05/02 Nokia Corporation Page A-10
Circuit Diagram of Synthesizer
Synthesize
r
100R
R520
C548
22p
VR3
VR1
C541
VR7
1u0
C544
VR3
120R/100MHz
L507
150p
R536
270R
R535
270R
470p
C550
C515
1u0
1u0
R515
2k2
C529
L502
VR7
120R/100MHz
R509
10R
C558
VR3A
1n0
C528
C525
100n
C514
10U
100p
C540
4k7
R505
47k
R533
R504
12p
C511
10R
5R6
R507
VR7
C554
8p2
10nH
L508
R506
5R6
100n
C521
R538
1k5
BFR93AW
V503
470R
82k
R534
R503
10U
C502
18p
C531
KT17-CCW28B
Vcon
GND
OUT
+VCC G502
19.2MHz
33p
C505
10U
C539
10n
C524
BBY57-02WV504
VCC
R511
2k2
C510
100n
VR3
C533
12p
GND
C546
1u0
R517
330R
1k0
R530
6p8
C537
C501
22p
L504
15nH
8p2
C555
R527
390R
120R
R501
15p
C547
1n0
C513
C509
4n7
47k
C552
1n0
R532
R537
VR3
18R
470p
C530
100R
R518
10= VR3A
12= GND
11
Do
13
fin
DIV
2
3
fout
4
LD
5
OSCin
BFP420
V501
VCC1
MB15C130PV1
N502
10nH
L501
GND
C520
100n
V505
1SV229
C517
12p
R512
10R
100n
C518
39p
C549
VR1
6p8
C538
C516
100p
6
Vt
7
RF1
8
9
C523
100n
ENFVD6L2S05
G501
1
RF2
10
VCC
2345
R525
100R
10R
R508
100k
R513
VR1
33p
C519
R529
2k2
C527
1u0
100R
R531
4n7
C542
8p2
C556
R514
100R
8p2
C503
18
fin IF
2
Vp1
20
Do IF
22
Vp2
3
Do RF
5
fin RF
6
fin RF
8
OSCin
23= VCC1
N501
24= VCC
4,7,10,16,19= GND
LMX2330LSLB
11
FoLD
12
Clock
14
Data
15
LE
17
fin IF
R521
33R
10nH
L506
R522
18k
C522
100n
C507
1n0
R502
10R
R526
3k3
8p2
C512
2k2
R510
1n2
C526
68R
R524
1n0
C551
68R
R519
8p2
C506
R528
VR1
C504
3k3
VR7
1n0
VR3
C543
100n
C534
C553
8p2
22p
L503
6n8H
C557
100n
V502
BFR93AW
R523
47R
100p
C535
47n
C508
3k3
R516
2p2
C536
L505
15nH
47p
C532
22p
C545
SYN_DAT
SYN_CLK
VR7
VR1
VR3
LO_TIF
CLK19M2RF
LO_PRX
LO_PTX
LO_RIF
AFC
SYN_LE1










