PAMS Technical Documentation Schematics / Layouts 8270 NSD-5 BB-RF Interface BB RF_DCT3 VR1 VR2 VR3 VR4 VR5 VR7 5V BVOLT RXIQ(3:0) TXIQ(3:0) TIF_EN RIF_EN CAFE_TX_GATE TX_LIM_ADJ TX_IF_AGC TX_RF_AGC TX_LIM RF_TX_GATE_P RX_IF_AGC RX_GS FILT_SEL_P FILT_SEL_N AFC SYN_CLK SYN_LE1 SYN_DAT CLK19M2RF PA_TEMP Issue 1 05/02 VR1 VR2 VR3 VR4 VR5 VR7 VR1 VR2 VR3 VR4 VR5 VR7 5V 5V BVOLT BVOLT RXIQ(3:0) TXIQ(3:0) RXIQ(3:0) TXIQ(3:0) TIF_EN RIF_EN CAFE_TX_GATE TX_LIM_ADJ TX_IF_AGC TX_RF_AGC TX_LIM
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5 Circuit Diagram of Baseband FBUS / MBUS CONNECTOR HF_MUTE RESETX CLK_EN EAD_HEADINT HOOKINT CAFE_TX_GATE CAFESIO(2:0) TXD(7:0) RXD(11:0) IQSEL SYN_CLK SYN_DAT SYN_LE1 SYN_CLK SYN_DAT SYN_LE1 SYN_CLK CLK19M2O CLK9M83 SYN_DAT HF_MUTE HF_MUTE RESETX RESETX CLK_EN CLK_EN EAD_HEADINT HOOKINT CAFE_TX_GATE CAFESIO(2:0) TX_RF_AGC FLASH CONNECTOR RESETX CLK_EN CAFE_TX_GATE CAFESIO(2:0) TXD(7:0) RXD(11:0) IQSEL IQSEL TXIQ(3:0) RXIQ(3:0)
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5 Circuit Diagram of MAD4 LCD_RESETX D100 MAD4_V14_F741718B HF_MUTE LCD_RESETX HF_MUTE BACKLIGHT TP100 LCD_CS STOP_CH STOP_CH TP101 EEPROMSDA TP102 EEPROMSDA TP103 EEPROMSCLK EEPROMSCLK TP105 LCD_CD LCD_CD MBUS’ A2 B3 A3 C4 M3 N1 J3 A4 C5 B5 A5 H3 DATA(15:0) DATA(0) DATA(1) DATA(2) DATA(3) DATA(4) DATA(5) DATA(6) DATA(7) DATA(8) DATA(9) DATA(10) DATA(11) DATA(12) DATA(13) DATA(14) DATA(15) SLEEPCLK CCONT_INT PURX HOOKINT TP106 O01
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5 Circuit Diagram of Memory VBB VBB D180 AT24C1024C1-10C1-2.
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5 Circuit Diagram of CCONT VBAT BC858W V310 VR7 VBB R334 47k R335 100k R337 1M0 R336 47k VR1 N302 VBAT R333 1M0 VR1_SW VR2 VR3 VR4 VR5 CCONT2M_WFD163ME64T_8 CLK_EN CLK_EN CAFE_TX_GATE R332 100k R338 BSI R339 10k PA_TEMP BTEMP 10k EAD PA_TEMP EAD C331 22p VBB C332 22p VR1 VR1_SW VR2 VR3/RAM_BCK VR4 VR5 VR6 VBB VREF VR7BASE VR7 G4 D1 C2 H1 C3 H2 SLEEPX CNTVR2 CNTVR3 CNTVR4 CNTVR5 TXPWR D2 B1 A3 B3 C4 D5 A1 A2 C1 VBAT ICHAR
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5 Circuit Diagram of CAFE R292 R241 R242 47R 1k0 82K EAD R243 68k C240 C241 33n 1u0 C242 R244 Z240 47R BLM11A601SPT XEAR 10U C243 C244 C245 100p 12p 12p R245 47k C246 1n0 V281 PDTC114EE 2x10k C250 R251 Z250 10U 47R BLM11A601SPT SGND HF_MUTE R1 R2 R250 100R C251 100p V280 BC848W C260 R260 C252 C253 C247 12p 12p 1n0 R261 XMICP VR1_SW 470R R280 C263 VR6 100k R205 VREF 10k TP207 TP206 RXIQ(3) RXIQ(
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5 Circuit Diagram of UI Module VBAT BVOLT BVOLT R410 B400 A410 + - BUZZER 10R C460 V400 1SS355 V410 STPS0520Z 1u0 R411 1 2 sig sig PCB NC 3 UX7V NC 4 VIBRA 10R R425 10R VIBRA BACKLIGHT VBB N420 TM23A BUZZER 1 VBAT TEST 20 2 ENABLEVIBRA_CNT 19 3 BUZZ_CNT VIBRA 16 6 BUZZER 7 BVOLT 8 LCD ILLUMINATION 9 V420 V421 V422 V423 V424 V425 CL-191B1-X-T CL-191B1-X-T CL-191B1-X-T CL-191B1-X-T CL-191B1-X-T CL-191B1-X
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5 Circuit Diagram of RF TX FILT_SEL_P FILT_SEL_P FILT_SEL_P FILT_SEL_N FILT_SEL_N FILT_SEL_N RF_TX_GATE_P RF_TX_GATE_P RF_TX_GATE_P TX_IF_AGC TX_IF_AGC TX_IF_AGC TX_LIM_ADJ TX_LIM_ADJ TX_LIM_ADJ TX_RF_AGC TX_RF_AGC TX_RF_AGC TIF_EN TIF_EN TIF_EN CAFE_TX_GATE CAFE_TX_GATE CAFE_TX_GATE TXIQ(3:0) TXIQ(3:0) TXIQ(3:0) LO_TIF LO_TIF LO_PTX LO_PTX VR1 VR2 VR3 VR4 VR4 VR4 VR5 VR5 VR5 TX_LIM VR7 VR7 5V PA_TEMP 5V BVOLT SYNTH VR7 VR
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5 Circuit Diagram of RX Antenna 50 ohms X701 L711 C701 2p2 L704 5n6H 2 X702 1 Z701 TX PCS_TX ANT DUPLEX RX FILTER VRX L703 6n2H C709 R701 4R3 100n LO_RIF L706 3n9H Z702 1930/1990MHz C710 R708 12p RX_IF_AGC 0R IN OUT 1p0 C708 OUT-GND IN-GND C726 VRX 12p RIF_EN L707 82nH C766 L705 VRX 4 16 10 11 3 R702 7 RX_GS 47k C702 18 19 23 24 12p L701 LO_PRX 4n7H 180nH N701 ALFRED_VQFN-24 P_MIX _IN AMPS_OUT C_MIX_IN MIX_OUT P_L
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5 Circuit Diagram of Synthesizer SYN_LE1 SYN_DAT SYN_CLK VR7 VR3 R504 10R R502 10R VR3 VR3 VCC R508 C502 C503 C505 C506 C507 C513 C514 C520 10U 8p2 10U 8p2 1n0 1n0 10U 100n 8 RF1 R537 LO_PRX R535 270R 18R R536 270R 1 RF2 R501 120R R506 5R6 10 G501 9 VCC 6 Vt ENFVD6L2S05 VCC1 R503 C504 C508 47n C509 C510 4n7 100n 15 14 12 C511 12p R505 4k7 C501 2 22p 3 5 6 8 C512 VR7 R522 R523 18k 47R C555 8p2 R509
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5 Circuit Diagram of TX FILT_SEL_P FILT_SEL_N BVOLT C661 Z600 FAR-F6CE-1G8800-L2XA 1880MHz N602 HORNET_RF2357E7 3 IN 3 2 1 RF GND RF 12p 1 12 N601 AT-119 VCC VCTL IN OUT1 6 IN_2 C603 VR4 OUT2 CH PD CAP1 CAP2 10 12p N603 SW-438TR 12p C609 V2 4 3 RF2 2 GND RFC 5 V1 6 1 RF1 N604 RF9208E8.
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5 Component Layout - Top Component Layout - Bottom Issue 1 05/02 Nokia Corporation Page A-12
