User Guide

CCS Technical Documentation Schematics / Layouts LG4 NHL-2NA
Issue 2, Amendment 1 08/2003 Nokia Corporation Page A-7
CPU Diagram
AA19
L21
A2
C21
K20
R1
A21
C1
E21
U21
RFBusEn1x
Y7
RFConvClk
Y8 Y9
COREGND3
AA13
N21
AA2
AA9
Y2
U21
J21
A19AA5 AA17
DO NOT USE GPIO(0 ) RIP IS RESERVED !
DBusDa
Y19
DSPGND2
Y2
PDRAMVCC1 DBusEn1X
Y20
Y21
TxQD
GenIO11
Y3 Y4
GenIO10
IOGND4
Y5 Y6
RFBusDA
Y1
CIFDaP
Y10
MicData FBusRx
Y12
DSPGND1
Y13
MBusRx
Y14
SIMCLK
Y15 Y16
SIMIOCTRL IOGND5
Y17 Y18
RxQD
W20
W21
AuxDa
W3
CIFDaN
W4
GenIO3
W5
GenIO0
W6
GenIO1 GenIO2
W7 W9
GenIO4
W12
GenIO6
MBusTx
W13
W15
GenIO7 GenIO8
W16 W17
GenIO9
TxID
W18
RxID
W19
W2
CIFClkN
V3
LVDSBias
V4
GenIO22
V5
GenIO21
V6 V7
GenIO20 GenIO19
V9
W1
CIFClkP EarData
W10
GenIO5
W11
V15
GenIO16 GenIO15
V16 V17
GenIO14
V18
GenIO13
V19
GenIO12
CBusEnX
V2
V20
LCDCSX
MMCDa
U18
GenIO24
U19
GenIO23
CBusDa
U2
DSPGND3
U20
U21
DSPVCC3
U3
MMCDaDir
U4
GPIO0
GenIO18
V11
GenIO17
V13
R9
GPIO23
GenIO27
T18
GenIO26
T19
T2
MMCClk
T20
LCDCamTx-Da1
MMCCmd
T3
T4
GPIO1 CBusClk
U1
EMU0
R18
GenTest1
R19
COREGND2
R2
R20
GenTest2
LCDCamClk1
R21
MMCCmdDir
R3 R4
GenIO28
R8
GPIO22
FLWEX
GenTest0
P20
P7
GPIO21
R1
COREVCC2 GPIO24
R10
R11
TestMode SleepClk
R12
PURX
R13 R14
SleepX EMU1
N19
FLCS2X
N2
MCUGND3
N20
MCUVCC3
N21
FLDa0
N3
FLOEX
N4
N7
GPIO20 GPIO25
P15
P2
JTDO
M19
M2
FLAd22
IOGND1
M20
FLDa8
M3
GPIO19
M7
N1
FLCS0X
N15
GPIO28 JTClk
N18
GPIO30
L15
L18
JTMS JTrst
L19
L21
IOVCC1
L3
FLDa9
L4
FLDa1
L7
GPIO18
M15
GPIO29 GPIO16
J7 K15
GPIO31
K19
JTDI
K2
FLAd18
K20
COREVCC5
FLDa2
K3
GPIO17
K7
FLAd17
L1
FLDa11
J1
GPIO32
J15
GPIO27
J18
J19
COREGND5
FLDa10
J2
MCUGND2
J20
MCUVCC2
J21
J3
GPIO35 GPIO34
J4
G3
FLDa3 FLDa4
G4
GPIO14
G8 G9
GPIO13
H15
GPIO15
H2
FLAd19
H20
GPIO5
H7
AEMSleepX
G12
GPIO10
G13
GPIO9 GPIO8
G14
GPIO3
G18
GPIO33
G19
FLRPX
G2
GPIO7
G20
GPIO6
G21
GPIO4
F19
FLPS
F2
F20
MCUGND1
FLDa12
F3
FLDa13
F4
G1
FLCS1X
G10
GPIO12
G11
GPIO11
FLClk
LCDDa1
E18
LCDFSP
E19
E2
FLADVX
LCDDISPClk
E20
E21
MCUVCC1
E3
FLDa6
E4
FLDa5
GPIO2
F18
FLAd20
LCDDa4
D20
D3
FLDa14
D4
FLDa7
D5
SDRDa0 SDRDa3
D6 D7
SDRDa5 SDRDa6
D9
E1
SDRDa7
D11
SDRDQML
GPIO36
D13
D15
SDRAd0 SDRAd2
D16
LCDDa5
D17
LCDDa2
D18
LCDDa3
D19
D2
IOGND2
C2
COREGND4
C20
C21
COREVCC4
FLDa15
C3 C4
FLCS3X
SDRDa1
C5
SDRDa2
C6 C7
SDRDa4
C9
C11
SDRCASX SDRRASX
C12
C13
GPIO37
SDRAd10
C15 C16
SDRAd1
C17
SDRAd3
LCDM
C18
SCVCC
C19
B3
SDRDa14
B4 B5
SDRDa13 SDRDa12
B6
B7
IOGND6
SDRDa10
B8 B9
SDRDa9
IOVCC2
C1
SDRWEX
C10
SDRAd8
B15 B16
SDRAd7 SDRAd6
B17 B18
SDRAd4
LCDDa0
B19
B2
FLAd21
RFClk
B20
LCDLLClk
B21
COREGND1 GPIO26
AA5
IOVCC4 RFBusClk
AA7 AA9
COREVCC3 FLAd16
B1
SDRDQMU
B10 B12
SDRCKE
B13
SDRAd13
B14
SDRAd11
AA1
FBusTx
AA11
DSPVCC1
AA13
SIMIODa
AA15 AA17
IOVCC5 DSPVCC2
AA19
AA2
PDRAMVCC2 DBusClk
AA20
AA21
UEMInt
AA3
A17
IOVCC7
A19
COREVCC1
A2
IOGND7
A20
A21
SCGND
A3
SDRDa15
A5
SDRDa11
IOVCC6
A7
SDRDa8
A9
GenIO25
4370871
UPP_WD2_V2.2
D100
FLRDY
A1
SDRCLK
A11
SDRAd12
A13 A15
SDRAd9 SDRAd5
37 36 35 34 33 32
/2 10n1
C106
C101
1 /2 10n
/2 10n
C104
2 /2 10n
2 3 4 5 6 7 8
J109
C102
1
J107
J106
0 9
10 11 12 13
1
J121
GND
R101 100R
2 1 0
14 13 12 11 10
9 8 7
GND
VCOREA
1 2
15
6 5 4 3
29 28 27 26 25 24 23
GND
0
J100
31 22 21 20 19 18 17 16 30
J105
GND
J101
C100
2 /2 10n
16 17 18 19 20 21
C104
1 /2 10n
18 19 20
13 22 23 24 25 26 27 28 14 15
543210
12 21 22 13 14 15 16 17
VCOREA
GND
GND
76
C100
1 /2 10n
J113
J110
C101
2 /2 10n
1 2 3 4 5 6 7 8
3210
3 4 5 6 7 8
VCOREA
0 9
10 11 12
0 9
10 11 12 13 14 15
1 2
J103
C102
2 /2 10n
R102
18k
J102
R100 100R
J111
0 1 2
1
GND
GND
01
VIOA
1 2 3 4 5 6 7 8
J104
02
J120
0 9
10 11
J118 J119
J108
GND
GND GND
C105
/2 10n2
C106
GND
1 /2 10n
0
210
J114
GND
9 6 2 7 1 0 3 4 5 8
21
GND
J115
C105
2 /2 10n
GND
345120
0 1 2
01
GND
0 1
0123456
GND
GND
102
J117 J116
9 0 8 7 6 5 4 3 2 1
CIF(3:0)
RFICCNTRL(2:0)
GND
VCOREA
AUDIODATA(1:0)
RFCONVDA(5:0)
I_SIMIF(3:0)
PUSL(2:0)
I_MMCIF(4:0)
SDRAMDATA(15:0)
SDRAMCTRL(7:0)
SDRAMADD(13:0)
MEMCONT(9:0)
MEMADDA(22:0)
I_FBUS(1:0)
I_MBUS(1:0)
JTAG(6:0)
DSP_MCUTEST(2:0)RFCLKGND
GPIO(37:0)
LCD(9:0)
LCD_CTRL(2:0)
AEMSLEEP
DBUS(2:0) CBUS(2:0)
RFCLK
UEM_INT
GENIO(28:0)
I_IRIF(2:0)