Programmes After Market Services NSB-5 Series Transceivers System Module Issue 1 03/01 Nokia Mobile Phones Ltd.
NSB-5 System Module Page 2 PAMS Technical Documentation Nokia Mobile Phones Ltd.
PAMS Technical Documentation NSB-5 System Module Contents Page No System Connector ........................................................................................................ 7 DC Connector ............................................................................................................. 9 Slide Microphone ........................................................................................................ 9 Slide Connector ......................................................
NSB-5 System Module PAMS Technical Documentation Flash Programming ................................................................................................... 47 IBI Accessories ......................................................................................................... 48 Phone Power–on by IBI ......................................................................................... 48 IBI power–on by phone...............................................................................
PAMS Technical Documentation NSB-5 System Module VC(TC)XO, Reference Oscillator.......................................................................... 77 VHF PLL in SUMMA .............................................................................................. 78 VHF VCO and Lowpass Filter............................................................................... 79 UHF PLL ..................................................................................................................
NSB-5 System Module PAMS Technical Documentation List of Figures Page No Figure 1: System Connector - module .......................................................................7 Figure 2: System Connector - detailed ..................................................................... 8 Figure 3: Combined headset, system connector audio signals ............................... 15 Figure 4: Battery connector locations ....................................................................
NSB-5 System Module PAMS Technical Documentation System Connector This section describes the electrical connection and interface levels between the baseband, RF and UI parts. The electrical interface specifications are collected into tables that cover a connector or a defined interface.
NSB-5 System Module PAMS Technical Documentation IBI connector (6 pads) B side view 8 Fixing pads (2 pcs) PCB ÂÂÂÂÂÂ DC Jack A B 1 14 7 Microphone Bottom acoustic ports BB connector (6 pads) ÁÁ Á ÁÁ Á Charger pads (3 pcs) Cable locking holes (3 pcs) A side view Figure 2: System Connector - detailed Table 1: System connector signals Pin Name Function Description 1 V_IN Bottom charger contacts Charging voltage 2 L_GND DC Jack Logic and charging ground 3 V_IN DC Jack Charging vol
NSB-5 System Module PAMS Technical Documentation DC Connector The electrical specifications in Table 3 shows the idle voltage produced by the acceptable chargers at the DC connector input. The absolute maximum input voltage is 18V due to the transient suppressor that is protecting the charger input. Slide Microphone The microphone is connected to the slide by means of springs it has a microphone input level specified in Table 2.
NSB-5 System Module PAMS Technical Documentation Table 3: System/IBI connector Pin IBpin NAME Function 10 Yes XEAR Analog audio output (from phone to accessory) Min Typ Accessory detection (from accessory to phone) Page 10 Unit Description 47 Ω Output AC impedance (ref GND) resistor tol. is 5% 10 uF Series output capacitance Ω Load AC impedance to GND: Headset 10 kΩ Load AC impedance to SGND: External accessory 1.0 Vp-p Max. output level.
NSB-5 System Module PAMS Technical Documentation Table 3: System/IBI connector Pin IBpin NAME Function Min 8 Yes XMIC Analog audio input (from accessory to phone) 2.0 Headset microphone input (from accessory to phone) 2.0 Typ Max Unit Description 2.2 kΩ Input AC impedance Ω Accessory source AC impedance 1 Vp-p Maximum signal level 2.2 kΩ Input AC impedance kΩ Headset source AC impedance 600 µA Bias current 200 mV Maximum signal level 100 2.
NSB-5 System Module PAMS Technical Documentation Table 3: System/IBI connector Pin IBpin 13 Yes NAME Function Min FBUS_ TX Serial data out (from phone to accessory) Typ Max Unit Description 0.1 0.8 V Output low voltage @ IOL
NSB-5 System Module PAMS Technical Documentation Table 3: System/IBI connector Pin IBpin NAME Function Min 11 Yes MBUS Bidirectional serial bus FLASH_ CLK Typ Max Unit Description 0 0.8 V Input low voltage (ref GND) 2.0 2.8 V Input high voltage (ref GND) 0 0.8 V Output low voltage @ IOL <4mA (ref GND) 2.1 2.9 V Output high voltage @ IOH <100 µA (ref GND) 4.
NSB-5 System Module PAMS Technical Documentation Table 3: System/IBI connector Pin IBpin NAME Function Min 1,3 - VIN Fast charger (from accessory to phone) Typ Max Unit Description 0 8.5 V Charging voltage 0 0.85 A Charging current 100 mV Ripple voltage @ f = 20...
NSB-5 System Module PAMS Technical Documentation VBB Baseband 47k 220k PC–Board HOOKDET MAD + 100n 220k HEADDET R01 + 100n CCONT EAD VBB AGND + C01 VBB SW01 AGND 2k2 10m C03 47k 47R HF COBBA –GJP AUX OUT XEAR C02 100MHz LGND 10k 33R 27p PD2 2k2 10u 1u HFCM MIC1N MIC1P MIC3N MIC3P AGND AGND 100R 2k2 100n 2k2 100n AGND 100R XMIC L01 SGND Z01 27p 100n 27p 330R 100n AGND AGND AGND R01= 100R C01=33uF C02=1000pF C03=22pF L01=MMZ2012Y6 01BT/TDK Note 1: Grey res
NSB-5 System Module PAMS Technical Documentation No metal in these areas! old connector type 1 3 4 2 B side view. phone Figure 4: Battery connector locations 1 +VBATT 2 BSI 3 BTEMP 4 -VBATT Vibra Alerting Device A special battery pack contains a vibra motor. The vibra is controlled with one PWM signal by the MAD2WD1 via the BTEMP battery terminal. SIM Card Connector The SIM card connector is located on the PCB. Only small SIM cards are supported.
NSB-5 System Module PAMS Technical Documentation Table 4: SIM Connector Electrical Specifications Pin Name Parameter Min Typ Max Unit Notes 2 VSIM 5V SIM Card 3V SIM Card 4.8 2.8 5.0 3.0 5.2 3.2 V Supply voltage 3 DATA 5V Vin/Vout 4.0 0 2.8 0 “1” “0” “1” “0” VSIM 0.5 VSIM 0.5 V SIM data Trise/Tfall max 1 us 4.0 2.
NSB-5 System Module PAMS Technical Documentation The following figure gives an example of IR transmission pulses. In IR transmission, a light pulse corresponds to 0–bit and a ”dark pulse” corresponds to 1–bit. constant pulse IR TX UART TX startbit 1 0 1 0 0 1 1 0 stopbit Figure 6: IR tramsmission frame - example The FBUS cannot be used for external accessory communication, when the infrared mode is selected. Infrared communication reserves the FBUS completely.
NSB-5 System Module PAMS Technical Documentation mined by some network parameters. When the sleep mode is entered both the MCU and the DSP are in standby mode and the normal VCTCXO clock has been switched off. The battery voltage range in DCT3 family is 3.0V to 4.5V depending on the battery charge and used cell type (Li–Ion or NiMH). Because of the lower battery voltage the baseband supply voltage is lowered to a nominal of 2.8V. The baseband is running from a 2.
NSB-5 System Module PAMS Technical Documentation Power Distribution In normal operation the baseband is powered from the phone‘s battery. The battery consists of one Lithium–Ion cell. There is also a possibility to use batteries consisting of three Nickel Metal Hydride cells or one solid state cell. An external charger can be used for recharging the battery and supplying power to the phone.
NSB-5 System Module PAMS Technical Documentation VCOBBA by the CCONT. There is a separate regulator for a SIM card which is selectable between 3V and 5V and controlled by the SIMPwr line from MAD2WD1 to CCONT. The CCONT contains a real time clock function, which is powered from a RTC backup when the main battery is disconnected. The RTC backup is rechargable polyacene battery. CCONT includes also six additional 2.8V regulators providing power to the RF section.
NSB-5 System Module PAMS Technical Documentation VSIM and V5V can give a total of 30 mA. Power Up The baseband is powered up by: 1 Pressing the power key, that generates a PWRONX interrupt signal from the power key to the CCONT, which starts the power up procedure. 2 Connecting a charger to the phone. The CCONT recognizes the charger from the VCHAR voltage and starts the power up procedure. 3 A RTC interrupt.
PAMS Technical Documentation NSB-5 System Module SLEEPX PURX CCPURX PWRONX VR1,VR6 VBB (2.8V) Vchar 1 2 3 1: Power switch pressed ==> Digital voltages on in CCONT (VBB). 2: CCONT digital reset released. VCXO turned on. 3: 62 ms delay to see if power switch is still pressed. Power Up by RTC RTC ( internal in CCONT) can power the phone up by changing RTCPwr to logical ”1”. RTCPwr is an internal signal from the CCONT digital section.
NSB-5 System Module PAMS Technical Documentation and the VCXO power control, VCXOPwr is set low. In this state only the 32 kHz sleep clock oscillator in CCONT is running. The flash memory power down input is connected to the VCXO power control, so that the flash is deep powered down during sleep mode. During sleep mode, the phone wakes up periodically to page the base station for incoming calls, location update, etc. The paging rate is a parameter set by the BS.
NSB-5 System Module PAMS Technical Documentation Startup Charging When a charger is connected, the CHAPS is supplying a startup current minimum of 130mA to the phone. The startup current provides initial charging to a phone with an empty battery. Startup circuit charges the battery until the battery voltage level reaches 3.0V (+/– 0.1V) and the CCONT releases the PURX reset signal and program execution starts.
NSB-5 System Module PAMS Technical Documentation When the switch in output overvoltage situation has once turned OFF, it stays OFF until the the battery voltage falls below VLIM1 (or VLIM2) and PWM = LOW is detected. The switch can be turned on again by setting PWM = HIGH.
NSB-5 System Module PAMS Technical Documentation VCH Vpor (Standard Charger) Droop depends on load & C in phone VLIM Istart off due to VCH
NSB-5 System Module PAMS Technical Documentation The performance travel charger (3– wire charger) is controlled with PWM at a frequency of 32Hz. When the PWM rate is 32Hz CHAPS keeps the power switch continuously in the ON state. SWITCH ON OFF ON OFF ON PWM (1Hz) SWITCH ON PWM (32Hz) Battery Identification Different battery types are identified by a pulldown resistor inside the battery pack. The BSI line inside transceiver has a 100k pullup to VBB.
NSB-5 System Module PAMS Technical Documentation and supply power off. Vcc 0.85 0.05 Vcc 0.55 0.05 Vcc SIMCARDDETX SIGOUT GND Battery Temperature The battery temperature is measured with a NTC inside the battery pack. The BTEMP line inside transceiver has a 100k pullup to VREF. The MCU can calculate the battery temperature by reading the BTEMP line DC–voltage level with a CCONT (N100) A/D–converter.
NSB-5 System Module PAMS Technical Documentation Table 8: Regulator States for Different Modes of Operation Operating mode Vref RF REG VCOBBA VBB VSIM SIMIF Power off Off Off Off Off Off Pull down Power on On On/Off On On On On/off On Off VR1 On On On On Pull down Off Off Off On On On/off Reset Sleep Note: CCONT includes five additional 2.8V regulators providing power to the RF section.
NSB-5 System Module PAMS Technical Documentation Slide EMI MAD COBBA Preamp Premult. Bias + EMI DSP MIC2 Pre & LP System Connector MIC1 EMI+ACC Interf. MCU Multipl. MIC3 A D XMIC SGND XEAR Amp Buzzer Driver Circuit Multipl. AuxOut HF EAR LP A D Buzzer Display EMI Figure 12: Audio Control The baseband supports three microphone inputs and two earphone outputs. The inputs can be taken from an internal microphone, a headset microphone or from an external microphone signal source.
NSB-5 System Module PAMS Technical Documentation External Audio Connections The external audio connections are presented in figure 16. A headset can be connected directly to the system connector. The headset microphone bias is supplied from COBBA AUXOUT output and fed to microphone through XMIC line. The 330ohm resistor from SGND line to AGNDprovides a return path for the bias current.
NSB-5 System Module PAMS Technical Documentation External accessory notices powered–up phone by detecting voltage in XMIC line. In Table 9 there is a truth table for detection signals.
NSB-5 System Module PAMS Technical Documentation The output for the internal earphone is a dual ended type output capable of driving a dynamic type speaker. The output for the external accessory and the headset is single ended with a dedicated signal ground SGND. Input and output signal source selection and gain control is performed inside the COBBA_GJP asic according to control messages from the MAD2WD1.
NSB-5 System Module PAMS Technical Documentation DSP code download, MCU interrupt handling vectors (in DSP RAM) and DSP booting – Serial port (connection to PCM) – Timer – DSP memory • BUSC (BusController for controlling accesses from ARM to API, System Logic, and MCU external memories, both 8– and 16–bit memories) • System Logic – CTSI (Clock, Timing, Sleep and Interrupt control) – MCUIF (Interface to ARM via BUSC).
NSB-5 System Module PAMS Technical Documentation C1 DSPGenOut2 I/O 2 DSP general purpose port TXL to RF D1 LCDCSX I/O 2 Serial LCD chip select – external pull-up/down LCDEN E1 LEADVCC0 PWR LEAD power Supply = VBB F1 Row0 I/O Keyboard row0, parallel LCD driver data Keyboard row0 G1 VCC_CORE PWR Power supply for core Supply = V2V H1 VCC_IO PWR I/O power supply Supply = VBB J1 MCUAd16 O 2 MCU address bus SRAM/FLASH address 16 K1 MCUAd13 I/O 2 MCU address bus SRAM/FL
NSB-5 System Module PAMS Technical Documentation E3 Row5LCDCD I/O 2/up Keyboard row5 data I/O, serial LCD driver command/ data indicator, parallel LCD driver read/write select LCDCD (LCD driver command/data indicator) F3 Row2 I/O 2/up Keyboard row2, parallel LCD driver data Keyboard row2 G3 MCUAd20 I/O 2/down MCU address bus SRAM/FLASH address 20 H3 MCUAd17 O 2 MCU address bus SRAM/FLASH address 17 J3 MCUAd14 I/O 2 MCU address bus SRAM/FLASH address 14 K3 MCUAd11 I/O 2 MCU
NSB-5 System Module PAMS Technical Documentation M5 MCURdX O 2 MCU read strobe MCU read strobe – OE to memories N5 MCUWrX O 2 MCU write strobe MCU write strobe – WE to memories A6 COBBACSX O 2 Chip select for COBBA COBBA chip select B6 VCC_IO PWR I/O power VBB C6 COBBAClk O COBBA clock, 13MHz COBBA clk (RFIclk) D6 AccRxData I Accessory Rx data, Flash_Rx Accessory Rx data, Flash_Rx (FBUS_Rx) K6 ExtMCUDa0 I/O 2/down MCU data bus SRAM/FLASH data 0 L6 ExtMCUDa1 I/O 2/
NSB-5 System Module PAMS Technical Documentation N8 ExtMCUDa7 I/O 2/down MCU data bus SRAM/FLASH data 7 A9 PCMRxData I/O Up Receive data, Rx Receive data, Rx (from COBBA PCMTx) B9 PCMTxData I/O 2/down Transmit data, Tx Transmit data, Tx (to COBBA PCMRx) C9 GND GND Ground GND D9 BuzzPWM I/O Buzzer PWM control Buzzer PWM control K9 GND I/O Ground GND L9 MCUGenIODa5 I/O 2/down General purpose I/O port – MCU data in 16-bit mode FLASH data 13 M9 MCUGenIODa4 I/O 2/down
NSB-5 System Module PAMS Technical Documentation E11 VCXOPwr O F11 HookDet G11 VCXO regulator control Sleep control (to CCONT SLEEPX input) I/O Non-MBUS accessory connection detector Non-MBUS accessory connection detector (system conn.
NSB-5 System Module PAMS Technical Documentation C13 RxPwr I/O 2/down Rx regulator control Base tune enable/disable control D13 SynthPwr I/O 2/down Synthesizer regulator control Transmit power control enable E13 MCUGenIO2 I/O 2/up General purpose I/O port LCDRSTX – LCD reset control F13 LEADGND GND LEAD ground GND G13 VCC_IO PWR VCC power VBB H13 ExtSysResetX O 2 System reset FLASH read protect control J13 EEPROMSelX I/O 2/up EEPROM chip select, can be used as MCU gern
NSB-5 System Module PAMS Technical Documentation C2 VSA5 P - Negative analog power supply for PCM ADC AGND D2 EARN O Float Negative ear-piece output To internal speaker E2 VSA4 P - Negative analog power supply for PCM DAC AGND F2 VREF I - Reference voltage input (1.
NSB-5 System Module PAMS Technical Documentation B5 PCMTx I/O ‘Z’ PCM bus receive data (4-wire) / I/ O data (1-wire) To MAD2WD1 PCMRxData C5 PCMSCLK O ‘Z’ 8 kHz frame sync (4-wire) / Pdata(8) (1-wire) To MAD2WD1 PCMSClk D5 PCMRx I/O ‘Z” PCM bus receive data (4-wire) / Pdata(10) (1-wire) To MAD2WD1 PCMTxData E5 Pdata(0) O ‘0’ Pdata(0) / Scanselect when test=1 Not used (floating) F5 AGCOut O 0V Second output of TxC DAC – Rx gain control voltage To SUMMA G5 TxQPhsP O Float Po
NSB-5 System Module PAMS Technical Documentation F7 RxQN I - Negative Q receive input in Rx_In-phase mode AGND G7 VDA1 P - Positive analog power supply for the receivers VCOBBA from CCONT H7 RxRef O Float Rx path internal reference buffered output Not used (floating) A8 VSUB P - Substrate contact for digital logic GND B8 VSS2 P - RF interface negative digital power supply GND C8 VDD2 P - RF interface positive digital power supply VBB D8 RFIClk I Inp System clock inp
NSB-5 System Module PAMS Technical Documentation Table 12: CCONT 3V pin assignment Pin Symbol Type 16 VBAT P 17 CNTVR4 I High Z Control VR4 regulator 18 TXPWR I High Z Control VR7 regulator (CNTVR7) 19 VR7BASE O High Z VR7 regulator base current 20 VR7 O High Z VR7 regulator output 21 VBAT P 22 VR6 O 23 GROUND P 24 SLEEPX I “1” Control VR1 regulator (CNTVR1) 25 VR1 O 2.
NSB-5 System Module PAMS Technical Documentation Table 12: CCONT 3V pin assignment Pin Symbol Type State in Reset Description 45 VBACK P backup battery backup battery input 46 CRA I crystal for 32 kHz sleep clock 47 CRB I crystal for 32 kHz sleep clock 48 SLCLK O sleep clock output 49 DATACLK I High Z MAD2WD1 bus clock 50 DATASELX I High Z MAD2WD1 bus enable 51 DATA_IN/OUT I/O High Z MAD2WD1 bus serial data 52 CCONTINT O “0” CCONT interrupt output 53 TEST I GND
NSB-5 System Module PAMS Technical Documentation ble number of wait states for each memory range. Program Memory 32MBit Flash The MCU program code resides in the flash program memory. The flash memory has a power down pin that shall be kept low, during the power up phase of the flash to ensure that the device is powered up in the correct state (read only).
NSB-5 System Module PAMS Technical Documentation The program execution starts from the BOOT ROM and the MCU investigates in the early start–up sequence if the flash prommer is connected. This is done by checking the status of the MBUS–line. Normally this line is high, but when the flash prommer is connected, the line is forced low by the prommer. The flash prommer serial data receive line is in receive mode waiting for an acknowledgement from the phone.
NSB-5 System Module PAMS Technical Documentation IBI power–on by phone Phone can power the IBI accessory on by pulling the BTEMP line up by MCUGenIO4 of MAD2. BTEMP measurement is not possible during this time. The accessory is commanded back to power–off by MBUS message.
NSB-5 System Module PAMS Technical Documentation RF Module RF Frequency Plan The following figure shows the RF frequency plan used by GSM1900. Figure 15: RF frequency plan DC Characteristics Power Distribution Diagram Current consumption of each regulator is shown in the following power distribution diagram (Figure 16 shows maximum currents, Figure 17 shows typical currents). On the left side of the figure, are the regulator control signals. Above each regulator is the rated current for that regulator.
NSB-5 System Module PAMS Technical Documentation 0.7mA VCXOEN VCTCXO buffer 1.0mA VVCXO VCTCXO VR1 31mA RXPWR VRX VR5 Receiver SUMMA (VRX) LNA CRFU2a (V_RX) RX mixer UHF CRFU2a (V_RX) VHF buffer + mix2 CRFU2a (V_VHF) VHF predivider SUMMA (VP1) UHF predivider SUMMA (VP2) Dredividers SUMMA (VDD) 3.3mA 11mA 18mA 9.4mA VSYN_D SYNPWR VR3 10mA 1.0mA 20mA UHF VCO VSYN_A 7.6mA VHF VCO VR4 9.0mA UHF buffer RX+TX VDET VR2 CRFU2a (V_UHF) 0.8mA detector / temp 0.6mA V5V V5V 0.
NSB-5 System Module PAMS Technical Documentation 0.7mA VCXOEN VCTCXO buffer 1.0mA VVCXO VCTCXO VR1 31mA RXPWR VR5 VRX Receiver SUMMA (VRX) LNA CRFU2a (V_RX) RX mixer UHF CRFU2a (V_RX) VHF buffer + mix2 CRFU2a (V_VHF) VHF predivider SUMMA (VP1) UHF predivider SUMMA (VP2) Dredividers SUMMA (VDD) 3.3mA 11mA 18mA 9.4mA VSYN_D SYNPWR VR3 10mA 1.0mA 20mA UHF VCO VSYN_A 7.6mA VHF VCO VR4 9.0mA UHF buffer RX+TX VR2 V5V VDET 1.6mA V5V 0.5mA CRFU2a (V_UHF) detector / temp 0.
NSB-5 System Module PAMS Technical Documentation Control Signals Table 15: Control signals and maximum current consumption VCXOEN SYNPWR RXPWR TXPWR TXP CURRENT consump. (typ.) CURRENT consump. (max) Notes L L L L L <10µA <10µA leakage current (PA) H L L L L 1.7mA 3.0 mA VCTCXO active H H L L L 42.5 mA 61.2 mA VCTCXO, VCOs PLL active H H H L L 107.8 mA 143.8 mA RX active H H L H L 140 mA 186.
NSB-5 System Module PAMS Technical Documentation Table 17: RF regulator specifications Characteristics Condition Min Line regulation F v 10kHz 49 dB Line regulation F v 100kHz 40 dB Load regulation T = 25o C Rise time (1% to 99%), 50mA, depends on load voltage reference/bias already ON, VR1 - VR7 Turn-on Overshoot C = 1µF, turn on/off Settling time (to 0.
PAMS Technical Documentation NSB-5 System Module optimal performance. SUMMA (N700) provides two main functions: 1. RX/TX blocks 2. PLL The receiver includes a Receive Controlled Gain Amplifier, a mixer with LO buffers and IF amplifiers. The transmitter section includes a Transmit Controlled Gain Amplifier, an I/Q Modulator, circuitry required to generate the Quadrature Local Oscillator and Transmit Power Control which controls the MMIC PA (N500) output power.
NSB-5 System Module PAMS Technical Documentation The bandpass filtered signal is fed back to CRFU_2a, where the signal is down converted with a double balanced active mixer (Gilbert cell) to 487 MHz. The local oscillator signal for this down conversion is generated by the UHF VCO (G700) and buffered in CRFU_2a. The first IF signal is bandpass filtered with SAW filter, which has external matching networks in both ends. This filter attenuates the intermodulating and image frequencies.
PAMS Technical Documentation NSB-5 System Module After filtering, the signal goes to the final amplifier, which is a MMIC PA (N500) with an input impedance of 50 ohms. The MMIC contains three amplifier stages with interstage matching. The first amplifier stage is variable and is control by the TX power control circuitry. An external driver is required to supply the necessary current to the TX power control circuitry. The PA has over 45 dB power gain and is capable of producing an output of 32.
NSB-5 System Module PAMS Technical Documentation at a moment when no RF power is being transmitted. This measured voltage is converted into a digital signal by an A/D converter where it is used by DSP as part of the control voltage. Ideally the control voltage is formed as a sum of exactly the same components as the output voltage of the detector, the rectified voltage and the bias voltage.
PAMS Technical Documentation NSB-5 System Module which is sampled so that no transmitter output RF signal is present during the measurement. A settling time of about 1ms should be allowed before the sampling is done after a transmitted burst. The values of the U bias range approximately from 50mV to 200mV. The loop amplifier input offset correction voltage ranges from –70mV to 70mV. The actual value will be measured for each RF module in production tuning.
NSB-5 System Module PAMS Technical Documentation DIR. COUPLER PA RF_OUT RF_IN KPA Kcp R1 K=–R1/R2 DETECTOR DOMINATING POLE R2 ERROR AMPLIFIER – + Kdet TXC CCONT ADC COBBA DAC MCU DSP Figure 18: Power Control Loop Frequency Synthesizers A 13 MHz VCTCXO module is used as a stable reference for both the RF and BB circuitry. Temperature variations in the VCTCXO module are controlled by an AFC voltage, which is generated by a 11 bit D/A converter in COBBA_GJ.
NSB-5 System Module PAMS Technical Documentation detector is a multiple of the 13MHz VCTCXO (reference frequency is 200 kHz). Output of the phase detector is connected to the charge pump, which charges or discharges the integrator capacitor in the loop filter depending on the phase of the measured frequency compared to reference frequency. The loop filter attenuates the pulses and generates a DC voltage which controls the frequency of UHF VCO.
NSB-5 System Module PAMS Technical Documentation to desired value (50mVp–p). This is accomplished in DSP by measuring the receive IQ level after the selectivity filtering (IF–filters, SD–converter and FIR–filter in DSP). This results in an AGC dynamic range of 50 dB with the remaining 7 dB for gain variations in RX–chain (for calibration). For RF levels below –95 dBm, the output level of the receiver drops dB by dB with a level of 7.1 mVp–p @ –110 dBm for GSM1900.
NSB-5 System Module PAMS Technical Documentation power sampling circuit and the ability of the software to reliably track multiple power levels during ramping. The two regions are from power level 15 through 7 and from 6 to 0. Provisions have been made in the service software to automatically track these break points in the calculation of the intermediate power levels. RF Block Specifications For further information on the different ASICs.
NSB-5 System Module Parameter Average power Weight Package size (L x W x H) Page 64 PAMS Technical Documentation Transmit section Receive section Unit 1 W approximately 2 g 10 x 17 x 4 mm Nokia Mobile Phones Ltd.
NSB-5 System Module PAMS Technical Documentation Receiver Blocks LNA in CRFU_2a Table 19: LNA requirements Parameter Minimum Frequency range 1930 Gain 15.5 Typical/ Nominal Maximum 16.5 NF Unit/Notes 1990 GHz 17.5 dB 2.0 dB HP3 -10 -8 dBm 1dB input compression point (AGC=H) -18 -12 dBm 34 dB Absolute gain reduction @ 1900...2000MHz Relative step accuracy +2 dB/over temp. range NF, when AGC-L approximately 1.
NSB-5 System Module PAMS Technical Documentation Table 20: Electrical charactistics Parameter Min Typ Max Unit/notes Attenuation relative to fo 1700...1830MHz 12 dB Attenuation relative to fo 1830...1910MHz 10 dB Attenuation relative to fo 2010...2070MHz 3 dB Attenuation relative to fo 2070...2200MHz 15 dB Attenuation relative to fo 2200...5000MHz 30 dB Attenuation relative to fo 5000...6000MHz 15 dB Maximum drive level 0 Package LxWxH Vibration dBm 3.0x3.0x2.
NSB-5 System Module PAMS Technical Documentation First IF Filter The first IF filter is a SAW filter to improve the blocking conditions caused by inband spurious signals which cause a noise rice effect in second mixer if looser filter is used. Table 22: First IF filter specifications Parameter Minimum Operating temperature range Typical/ Nominal Maximum Unit/Notes -30 ... +85 deg. C Center frequency, fo 487 MHz Maximum Ins. loss at 1dB BW 3.
NSB-5 System Module PAMS Technical Documentation Parameter Minimum Power gain 7 Typical/ Nominal Maximum NF, SSB driven differential Unit/Notes 9 dB 12 dB IIP3 single ended +4 dBm Input compression (IdB) -5.5 dBm Input impedance 200 1/2 IF spurious Pin =-26dBm -95 ohms LO power in RF-input -80 dBm / 1/2IF at 443.5MHz -25 dBm Table 24: Simulated typical values at lower temperatures (Note 1) 25o C -20o C -30o C Gain 8 dB 8 dB 8 dB NF 8.
NSB-5 System Module PAMS Technical Documentation Parameter Minimum Terminating capacitance Typical/ Nominal Maximum Unit/Notes Input: 8.7 Output: 14.7 pF Package L x W x H mm AGC and Third Mixer in SUMMA Table 26: AGC and third mixer specifications Parameter Minimum Typical/ Nominal Maximum Unit/Notes Input frequency 87 MHz Output frequency 13 MHz Total noise figure, SSB, max. gain 15 dB/source=470W Total noise figure, SSB, min. gain 65 dB/source=470W Max.
NSB-5 System Module PAMS Technical Documentation Third IF Filter Table 27: Third IF filter specification Parameter Typical/ Nominal Minimum Center frequency, fo Maximum Unit/Notes 13 1 dB bandwidth; 1 dBBW MHz +/-90 kHz Insertion loss 6.0 dB Amplitude ripple at 1 dBBW 1.0 dB Group delay ripple at 1 dBBW 1.
NSB-5 System Module PAMS Technical Documentation Parameter Minimum Typical/ Nominal Maximum Input level (balanced) Input resistance (balanced) 1.2 200 Unit/Notes Vpp kohms Input capacitance (balanced) 4 pF Input bias current (balanced) 100 nA Input common mode voltage 0.8 V IQ-input phase balance total, temperature included -4 4 degrees IQ-input phase balanced over temperature -2 2 degrees IQ-input gain balanced total, temperature included -0.5 0.
NSB-5 System Module PAMS Technical Documentation Upconversion Mixer and Buffer in CRFU_2a Table 30: Upconversion mixer and buffer specifications Parameter Minimum Input frequency Output frequency range Output level Pin=-15dBm”2dB Typical/ Nominal Maximum 400 1710 0 4 Unit/Notes MHz 1910 MHz 8 dBm Relative gain variations over temp 25oC /100oC -0.3 0 dB Relative gain variations over temp 25oC / -30oC 0 +0.3 dB Relative gain variations over Vdd 2.8V / 2.9V -0.
NSB-5 System Module PAMS Technical Documentation GSM1900 TX SAW Filter Table 31: Electrical characteristics Parameter Minimum Passband Terminating impedance Typical/ Nominal Maximum Unit/Notes 1850 - 1910 MHz 50 ohms Insertion loss in passband 4.8 dB Amplitude ripple in passband 2.8 dB VSWR in passband 2.5 Attenuation DC ... 1600 MHz 25 27 dB Attenuation 1600 ... 1780 MHz 30 35 dB Attenuation 1930 ... 1990 MHz 10 22 dB Attenuation 2040 ...
NSB-5 System Module PAMS Technical Documentation Parameter Minimum Passband Typical/ Nominal Maximum 1850 Unit/Notes 1910 MHz Terminating impedance 50 Insertion loss in passband 3.0 4.0 dB Amplitude ripple in passband 1.5 2.5 dB Return loss in passband 8.0 10 *Attenuation relative to fo DC ... 1600 MHz 30.0 dB Attenuation relative to fo 1600 ... 1820 MHz 15 dB Attenuation relative to fo 1930 ... 1990 MHz 5.0 dB Attenation relative to fo 2100 ... 5000 MHz 20.
NSB-5 System Module PAMS Technical Documentation Parameter Symbol Test condition Max Unit Pin= +6 dBm Pout= +1.0 ... +33 dBm Vcc=3.5V -35 dBc VSWRi1 Pin=0 ... +6 dBm Pout=+33.0 dBm 2:1 VSWRi2 Pin=0 ... +6 dBm Pout=+1.0 ...
NSB-5 System Module PAMS Technical Documentation Directional Coupler Table 35: Directional coupler specifications Parameter Minimum Frequency range Typical/ Nominal 1850 Maximum Unit/Notes 1910 MHz Impedance level of primary circuit 50 ohms Impedance level of secondary circuit 200 ohms VSWR on primary line 1.8 Insertion loss 0.
NSB-5 System Module PAMS Technical Documentation Parameter Minimum Typical/ Nominal Maximum TXP input voltage, LOW Unit/Notes 0.5 TXP input voltage, HIGH V 2.4 Opaout voltage if TXP=low & bit S18in control register is 0 V 0 opaout-output current driving capability V 4 OP1 output impedance mA 50 Offset of OP1 op.
NSB-5 System Module PAMS Technical Documentation Parameter Minimum Typical/ Nominal Maximum Unit/Notes Frequency stability over the temperature range (ref. @ 25o C) -5.0 +5.0 ppm Frequency stability vs supply voltage (2.8_100mV) -0.1 -0.1 ppm Frequency stability vs load change (_10%) -0.3 +0.3 ppm Aging -1.0 +1.0 ppm Nominal voltage for center frequency 1.3 Control voltage range V 0.3 2.
NSB-5 System Module PAMS Technical Documentation Parameter Minimum Typical/ Nominal Phase comparison frequency Maximum Unit/Notes 1 Charge pump output MHz 0.5 mA Sink to source current matching error of the charge pump +/- 5 % Charge pump current error +/- 10 % Charge pump min. output voltage 0.5 V Charge pump max. output voltage VCE-0.
NSB-5 System Module Parameter PAMS Technical Documentation Minimum Typical/ Nominal Maximum Unit/Notes Operating temperature -10 75 C Storage temperature -40 85 C Package 8.8 x 6.8 x 1.8 mm (max) SMD reflow UHF PLL Table 42: UHF synthesizer specifications Parameter Minimum Typical/ Nominal Start up settling time Settling time +/- 83 MHz at operating frequency range 500 Phase error Maximum Unit/Notes 3.0 ms 800 µs 2 degrees/RMS dBc Sidebands +/- 200 kHz +/- 400 kHz +/- 600...
NSB-5 System Module PAMS Technical Documentation Parameter Minimum Typical/ Nominal Maximum Unit/Notes Sink to source current matching error of the charge pump +/- 5 % Charge pump current error +/- 10 % Charge pump leakage current 5 nA Phase detector phase noise level -163 dBc/Hz GSM1900 UHF VCO module Table 44: UHF VCO specifications Parameter Minimum Typical/ Nominal Maximum Control voltage (Vc) Unit/Notes V Oscillation frequency 1443.2 1509.8 MHz TX frequency range 1450.
NSB-5 System Module Parameter PAMS Technical Documentation Minimum Typical/ Nominal Maximum Unit/Notes Operating temperature -10 75 C Storage temperature -40 85 C Package 6.0 x 8.0 x 1.
PAMS Technical Documentation NSB-5 System Module Data Interface and Timing SUMMA is programmed via the serial bus SLE, SDAT, and SCLK. The data of SDAT is clocked by rising edge of SCLK. The data is fed MSB first and address bits before data bits. The data for the programmable dual modulus counter is fed first and the swallow counter last. SLE is kept low while clocking the data. During programming, the charge pump attached to programmed divider is switched to high impedance state.
NSB-5 System Module PAMS Technical Documentation Synthesizer Timing Control 6.9 ms ( 1.5 x 4.6 ms ( frame ) 100 us min. 9.08us 9.08us 9.08 us 9.08 us 7.08 us RXPWR SYNPWR 2us min SENA SDATA/ SCLK #bits MODE VHF R VHF N/A UHF R UHF N/A 23 23 23 23 23 Synthesizer Start–up Timing / Clocking MON 20 ms VCXOEN SYNPWR RX MON RX MON RX MON 4.615 ms RX 0.5–2 sec. 6.
NSB-5 System Module PAMS Technical Documentation MON SYNPWR RX TX MON RX TX MON RX TX MON RX 150 us TXPWR TXP TXC 150 us 150 us RXPWR AGC SENA SDATA/ SCLK Synthesizer Timing / traffic channel RX time slots 0 TX 1 2 3 MON 4 5 RX 6 7 0 SYNPWR RXPWR TXPWR TXP SENA SDATA/ SCLK RX ONLY UHF– PLL N AND A REGISTERS CLOCKED TX MON RX 50 us max. 50 us max. 50 us max. UHF–Synthesizer Timing / traffic channel Issue 1 03/01 Nokia Mobile Phones Ltd.
NSB-5 System Module PAMS Technical Documentation Transmit Power Timing 542.8 us Pout 6.5...59 us TXC TXP 0...59 us 0...58 us TXPWR 150 us 50 us Transmitter Timing Diagram Interfacing The interfacing between RF and BB is comprised of the signals stated below: SCLK Clock for the PLL Serial Programming (3.
PAMS Technical Documentation NSB-5 System Module User Interface The UI module includes the following: • LEDs for backlight • Plastic window • Dust seal • LCD adhesive • Light guide • Reflector • Connector • LCD cell (GD50) with display driver • ON/OFF key • Speaker connections. The module is delivered as a single assembly (refer to Disassembly section).
NSB-5 System Module PAMS Technical Documentation Figure 21: Mounting of LEDs for backlight (seen from underside) Plastic Window The window is mounted on top of the LCD module. It snaps into the light guide in three places. If a broken window needs to be replaced, it is replaced together with the dust seal. Dust Seal The dust seal is made of foam with adhesive backing on both sides. It keeps dust out of the LCD module and protects it from excessive pressure on the window, if pressed too hard.
NSB-5 System Module PAMS Technical Documentation Figure 22: Light guide The figure below shows the code marking for the light guide. YWWE ID code Y W W E Factory code Week Year Figure 23: Marking specification for the light guide Issue 1 03/01 Nokia Mobile Phones Ltd.
NSB-5 System Module PAMS Technical Documentation UI Module Connection to Main PCB Table 46: Module interface Pin Signal 1 Temp sensor 2 LDCDCX Symbol Parameter Minimum Temperature at LCD for compensation of contrast and brightness. Reference to GND. tsas tsah Control/display data flag input Typical/ Nominal Maxim um 47 kΩ NTC resistor @25oC) Note: Not used in HD955 150 150 low HIGH 3 SPKR_p 4 LCDCSX Speaker connection tcss tcsh Chip select input, active low 150 0.
NSB-5 System Module PAMS Technical Documentation Table 46: Module interface Pin Signal 14 RES Symbol Parameter Minimum Typical/ Nominal Reset 1.0 Signal Symbol data signals tr,tf Issue 1 03/01 Parameter Minimum Nokia Mobile Phones Ltd. Typical/ Nominal Maxim um Unit/Notes 0.
NSB-5 System Module PAMS Technical Documentation Parts List System Module (0201192) (EDMS V8.7) R100 1430788 Chip resistor R101 1825005 Chip varistor vwm14v vc30v 0805 R102 1419003 Chip resistor 0w5 0r22 j 200 ppm47 k j 1210 R103 1430796 Chip resistor 0w06 47 k j 0402 R104 1430770 Chip resistor 4.7 k 0402 R105 1430754 Chip resistor 0w06 1.0 k j 0402 R106 1419003 Chip resistor 0w06 47 k j 0402 R107 1430762 Chip resistor 0w06 2.
NSB-5 System Module PAMS Technical Documentation R130 1430778 Chip resistor R131 1825005 Chip varistor vwm14v vc30v R132 1430762 Chip resistor R133 1825005 Chip varistor vwm14v vc30v 0805 R134 1430740 Chip resistor 0w06 330 r j 0402 R135 1430778 Chip resistor 0w06 10 k j 0402 R136 1825005 Chip varistor vwm14v vc30v 0805 R137 1430754 Chip resistor 0w06 1.
NSB-5 System Module PAMS Technical Documentation R409 1430744 Chip resistor 0w06 470 r j 0402 R410 1430744 Chip resistor 0w06 470 r j 0402 R411 1430732 Chip resistor 0w06 180 r j 0402 R412 1430744 Chip resistor 0w06 470 r j 0402 R413 1430778 Chip resistor 0w06 10 k j 0402 R414 1430714 Chip resistor 0w06 33 r j 0402 R415 1430714 Chip resistor 0w06 33 r j 0402 R416 1430804 Chip resistor 0w06 100 k j 0402 R417 1825001 Chip varistor vwm 18v vc40v 0603 R418 1825001
NSB-5 System Module PAMS Technical Documentation R546 1430718 Chip resistor 0w06 47 r j 0402 R570 1419003 Chip resistor 0w06 47 k j 0402 R571 1430716 Chip resistor 0w06 39 r j 0402 R572 1430726 Chip resistor 0w06 100 r j 0402 R590 1430700 Chip resistor 0w06 10 r j 0402 R591 1430732 Chip resistor 0w06 180 r j 0402 R592 1430700 Chip resistor 0w06 10 r j R602 1419003 Chip resistor 0w06 47 k j 0402 R603 1419003 Chip resistor 0w06 47 k j 0402 R604 1430740 Chip resis
NSB-5 System Module PAMS Technical Documentation R756 1430706 Chip resistor 0w06 15 r j 0402 R757 1430716 Chip resistor 0w06 39 r j 0402 R758 1430778 Chip resistor 0w06 10 k j 0402 R759 1430700 Chip resistor 0w06 10 r j 0402 R760 1430740 Chip resistor 0w06 330 r j 0402 R834 1430710 Chip resistor 0w06 22 r j 0402 R835 1430744 Chip resistor 0w06 470 r j 0402 R836 1430693 Chip resistor 0w06 5r6 j 0402 R838 1430778 Chip resistor 0w06 10 k j 0402 R839 1430740 Chip
NSB-5 System Module PAMS Technical Documentation C111 2312411 Chip cap x5r 1u0 m 25 v 1206 C112 2320805 Chip cap x5r 100 n k 10 v 0402 C113 2320783 Chip cap x7r 33 n k 10 v 0402 C114 2320592 Chip cap x7r 2n2 j 50 v 0402 C115 2610003 Chiptcap 10u m10 v 3.2x1.6x1.
NSB-5 System Module PAMS Technical Documentation C146 2320778 Chip cap x7r 10 n k 16 v 0402 C147 2320546 Chip cap np0 27p j 50 v 0402 C148 2320783 Chip cap x7r 33 n k 10 v 0402 C149 2320744 Chip cap x7r 1n0 k 50 v 0402 C150 2320508 Chip cap np0 1p0 c 50 v 0402 C151 2610003 Chiptcap 10u m10 v 3.2x1.6x1.
NSB-5 System Module PAMS Technical Documentation C300 2320744 Chip cap x7r 1n0 k 50 v 0402 C302 2320778 Chip cap x7r 10 n k 16 v 0402 C303 2320805 Chip cap x5r 100 n k 10 v 0402 C304 2320778 Chip cap x7r 10 n k 16 v 0402 C306 2320778 Chip cap x7r 10 n k 16 v 0402 C307 2320778 Chip cap x7r 10 n k 16 v 0402 C308 2320481 Chip cap x5r 1uk 6v3 0603 C309 2320481 Chip cap x5r 1uk 6v3 0603 C310 2320481 Chip cap x5r 1uk 6v3 0603 C311 2320481 Chip cap x5r 1uk 6v3 0603
NSB-5 System Module PAMS Technical Documentation C524 2320584 Chip cap x7r 1n0 j 50 v 0402 C525 2320548 Chip cap np0 33 p j 50 v 0402 C526 2320548 Chip cap np0 33 p j 50 v 0402 C527 2320584 Chip cap x7r 1n0 j 50 v 0402 C531 2320576 Chip cap x7r 470p j 50 v 0402 C535 2320546 Chip cap np0 27p j 50 v 0402 C536 2320546 Chip cap np0 27p j 50 v 0402 C539 2320546 Chip cap np0 27p j 50 v 0402 C540 2320546 Chip cap np0 27p j 50 v 0402 C541 2320560 Chip cap np0 100p j
NSB-5 System Module PAMS Technical Documentation C614 2320752 Chip cap x7r 2n2 k 50 v 0402 C616 2320584 Chip cap x7r 1n0 j 50 v 0402 C617 2320584 Chip cap x7r 1n0 j 50 v 0402 C618 2320778 Chip cap x7r 10 n k 16 v 0402 C619 2320752 Chip cap x7r 2n2 k 50 v 0402 C620 2320560 Chip cap np0 100p j 50 v 0402 C621 2320532 Chip cap np0 6p8 c 50 v 0402 C622 2320532 Chip cap np0 6p8 c 50 v 0402 C623 2320939 Chip cap np0 hq 10 p f 16 v 0402 C624 2320564 Chip cap np0 150 p
NSB-5 System Module PAMS Technical Documentation C731 2320524 Chip cap np0 3p3 c 50 v 0402 C732 2320540 Chip cap np0 15 p j 50 v 0402 C734 2312401 Chip cap x5r 1u0 k 10 v 0805 C735 2611749 Chiptcap 6u8 m 10 v 2.0x1.35x1.35 C759 2320560 Chip cap np0 100p j 50 v 0402 C760 2320744 Chip cap x7r 1n0 k 50 v 0402 C761 2320546 Chip cap np0 27p j 50 v 0402 C762 2611749 Chiptcap 6u8 m 10 v 2.0x1.35x1.
NSB-5 System Module PAMS Technical Documentation L560 3645071 Chip inductor-0805hq L601 3646007 Chip coil 27n j q27/800mhz 0402 L602 3646007 Chip coil 27n j q27/800mhz 0402 L603 3645183 Chip coil 56n j q12/100mhz 0603 L607 3645037 Chip coil 150nh k q15/25mhz 0603 L608 3645037 Chip coil 150nh k q15/25mhz 0603 L609 3645037 Chip coil 150nh k q15/25mhz 0603 L655 3203709 Ferrite bead 0.
NSB-5 System Module PAMS Technical Documentation Z621 4511033 Saw filt 487 +/-0.2mhz/4.5db 4x4 Z700 4511001 Saw filt 87 +/-0.12mhz/10db 14.2x8.4 Z701 4510009 Cer.filt 13+/-0.09mhz V100 4113611 Emi filt/tvs emif01-10005w5 sot353 V101 4113611 Emi filt/tvs emif01-10005w5 sot353 V102 4113611 Emi filt/tvs emif01-10005w5 sot353 V103 4210215 Tr mmbt589 p 30v 1a 0.3w 80 sot23 V104 4110067 Sch di mbr0520l 20v 0.5a sod123 V105 4110601 Di fast 1ss355 80V0.
NSB-5 System Module PAMS Technical Documentation V510 4210074 Tr bfp420 n 4.5v35ma V511 4210052 Tr dtc114ee n rb=rbe=10k em3 V702 4210100 Tr bc848w n 30v 0.1a 100mhz sot323 V720 4210074 Tr bfp420 n 4.5v35ma 20ghz sot343 V808 4210015 Tr bfp405 n 4.5v12ma 20ghz sot343 D100 4340387 Tc7w66fu 2xbilateral switch ssop8 D300 4370593 Mad2wd1 v9/11 f731635a/b ubga144 D301 4340597 Flash 2mx16 115ns 2.
NSB-5 System Module Page 106 PAMS Technical Documentation Nokia Mobile Phones Ltd.