User Guide

PAMS
Technical Documentation
NSE–5
System Module
Page 2 – 44
Issue 1 07/99
Table 12. CCONT 3V Pin assignment (continued)
DescriptionState In ResetTypeSymbolPin
21 VBAT P Unregulated supply voltage
(RF)
22 VR6 O 2.8V VR6 regulator output (COB-
BA_GJP)
23 GROUND P (RF)
24 SLEEPX I ”1” Control VR1 regulator
(CNTVR1)
25 VR1 O 2.8V VR1 regulator output (VCXO)
26 VR1_sw O High Z VR1 switched output
27 VBAT P Unregulated supply voltage
(RF)
28 VBAT2 P Unregulated supply voltage
(VSIM, V5V, SMR, SIMIf)
29 PWRONX/
WDDISX
I VBAT/GND Power on control from keyboard
Watchdog disable
30 SIM_PWR I ”1”/”0” SIM regulator enable
31 GROUND P (VSIM, V5V, SMR, SIMIf)
32 V5V O High Z 5V dc voltage output
33 V5V_2 O High Z Reserved for 5V SMR
34 V5V_4 O High Z Reserved for 5V SMR
35 V5V_3 O High Z Reserved for 5V SMR
36 VSIM O 3.0V/High Z SIM regulator output
37 GROUND P (VSIM, V5V, SMR, SIMIf)
38 SIMCLK_O O ”0” Clock output from SIM interface
(5MHz)
39 SIM I/O_C I High Z SIM data I/O control
40 SIMRST_A I High Z SIM interface reset (from
MAD2PR1)
41 SIMCLK I High Z Clock to SIM interface (5MHz)
42 SIMRST_O O ”0” Reset output from SIM–inter-
face (to SIM)
43 DATA_O I/O ”0” SIM data I/O line
44 DATA_A I/O ”0” SIM–Interface MAD2PR1 Data
45 VBACK P Backup Battery Backup Battery Input
46 CRA I Crystal for 32kHz sleep clock
47 CRB I Crystal for 32kHz sleep clock