User Guide

RH-26

2 - System Module CCS Technical Documentation

Page 36 ©Nokia Corporation Issue 1 02/04

Figure 18: Speaker connection

Memory block

For the MCU, UPP includes ROM, 2x4kbytes, that is used mainly for boot code of MCU. To

speed up the MCU operation, small 4 kbytes cache is also integrated as a part of the

MCU memory interface. For program memory, 8Mbit (512k x 16bit) PDRAM is integrated

into the UPP. RAM block can also be used as data memory and it is byte addressable.

RAM is mainly for MCU purposes but also DSP has access to it if needed.

RH-26 needs also external RAM to have sufficient RAM capacity. A combo flash is used

for that purpose (single package with stacked ICs, 128Mbit flash + 16Mbit pseudo RAM).

MCU code is stored into external flash memory. The size of the flash is 128Mbit (8M x

16bit). The RH-26 baseband supports a burst mode flash with multiplexed address/data

bus. Access to the flash memory is performed as a 16–bit access. The flash has read-

while-write capabilities which makes the emulation of EEPROM within the flash easy.

RF interface block

The interface between the baseband and the RF can be divided into two categories.

Firstly, there is a digital interface from the UPP to the HELGO chip. The interface is used

to control the operation of the different blocks in the HELGO chip. This serial interface is

also connected to the UEMK. The operation of the RF converters and the RF regulators in

then UEMK is controlled by this serial interface. Secondly, there is an analogue interface

between the RF and the baseband is connected to the UEMK. The analogue interface

consists of RX and TX converter signals. The power amplifier control signal TXC as well as

the AFC signal comes from the UEMK. PWB

1000

Ω

@100MHz

Ω

EARP

EARN

UEM

14V

Ω

14V

27pF