User Guide

PAMS Technical Documentation 2 - Broadband System

NPE-4

Original ãNokia Corporation. Page 2-7

buzzer driver receives a PWM signal where both frequency and duty-cycle are pre-set by

Hz, 128 Hz, 258 Hz and 520 Hz and the duty cycle 2.9 % to 96.9 %. LCD and keyboard

light LED drivers receive a PWM signal of 128 Hz where the duty-cycle can be pro-

grammed by setting a 4-bit register.

The UEM also contains an IR driver supporting 9600 bps to 1152 kbps, semi duplex. This

driver works as a level shifter on the RX and TX lines to and from the UPP.

The UEM contains a real-time clock sliced down from the 32768 Hz crystal oscillator. The

32768 Hz clock is fed to the UPP as a sleep clock.

The communication between the UEM and the UPP is done on the bi-directional CBUS

and DBus. The CBUS is controlled by the MCU and can operate at a speed of maximum 1

MHz. The DBus is controlled by the DSP and can operate at a maximum speed of 13 MHz.

Both processors are located in the UPP.

Environmental Specifications

Absolute maximum ratings

Normal and extreme voltages

Nominal voltage: 3.6 V (VBAT, Main battery voltage)

Lower extreme voltage: 2.9 V (V

COFF-

, Hardware cut-off voltage)

Higher extreme voltage 5.4 V (VBAT

LIM2+

, Upper charger limit)

Conditions set by UEM.

Minimum guarantied

operating voltage 3.04 V (DCT4 Engine minimum cut-off voltage)

Table 1: Absolute maximum ratings

Parameter Rating Remarks

Supply voltage, VBAT -0.3 V - 5.5 VDC Supply voltage for UEM

Charger input voltage, VCH -0.3 V - 16 VDC Conditions set by UEM. Input

clamped @16 VDC.

-0.3 – 20 VDC