User Guide

NPE-4
2 - Broadband System PAMS Technical Documentation
Page 2-4 ãNokia Corporation. Original
List of Figures (continued)
Figure 7 UEM charging state diagram, PWM mode only ................................................ 17
Figure 8 Charging scenario where the battery is abruptly removed ............................ 18
Figure 9 Mechanical layout of DCT-3 battery .................................................................... 19
Figure 10 UPP architecture ........................................................................................................ 20
Figure 11 Complete overview of LCD module ....................................................................... 22
Figure 12 LCD module ................................................................................................................. 23
Figure 13 LED driver circuit for display and key light ......................................................... 24
Figure 14 NPE-4 IR connectivity ............................................................................................. 25
Figure 15 UPP, UEM and SIM connections ............................................................................ 26
Figure 16 Basic reading (random access) ............................................................................... 27
Figure 17 Write waveform (random access) ......................................................................... 28
Figure 18 The data is compared by using an XOR-function ............................................. 29
Figure 19 The comparison shows more unequal bits .......................................................... 30
Figure 20 Burst mode reading from the flash ....................................................................... 32
Figure 21 NPE-4 keypad ............................................................................................................ 35
Figure 22 Placement of SIM pins (phone bottom view) ..................................................... 37
Figure 23 SW interface diagram ............................................................................................... 39
Figure 24 BT102 Flash programming ...................................................................................... 39
Figure 25 BT102 HW interface .................................................................................................. 40
Figure 26 XEAR connection .......................................................................................................51
Figure 27 XMIC connection ....................................................................................................... 52
List of Tables
Table 1 Absolute max. ratings ............................................................................................... 7
Table 2 Temperature conditions for NPE-4 ...................................................................... 8
Table 3 UEM regulator outputs and state in SLEEP ........................................................ 12
Table 4 NPE-4 current consumption from VFLASH during SLEEP mode .................. 13
Table 5 LCD current consumption ........................................................................................ 23
Table 6 Absolute max. ratings for AMD 64Mbit .............................................................. 34
Table 7 Absolute max. ratings for Intel 64Mbit ............................................................... 34
Table 8 LCD module pin-out to PWB .................................................................................. 36
Table 9 SIM connector interface .......................................................................................... 37
Table 10 Ostrich interface ........................................................................................................ 38
Table 11 JTAG interface levels ................................................................................................. 38
Table 12 BT - BB interface description ................................................................................. 40
Table 13 Digital signals ............................................................................................................. 43
Table 14 Analoge signals .......................................................................................................... 44
Table 15 Regulators and references ....................................................................................... 48
Table 16 MBus interface .......................................................................................................... 50
Table 17 FBus interface ............................................................................................................ 50
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