User Guide

PAMS Technical Documentation 2 - Broadband System
NPE-4
Original ãNokia Corporation. Page 2-33
valid until MCU sets a bit in the UEM register, which indicates the "end of flash program-
ming". Setting this bit also clears the compare register in the UEM previously loaded, at
the falling edge of the BSI signal. During the "flash programming mode" the UEM watch-
dog is disabled. When the bit is set it indicates "end of flash programming" and it resets
the UEM watchdog timer to it’s default value. Clearing the flash programming bit also
causes the UEM to generate a reset to the UPP. The BSI signal is used to load the value
into the compare register. In order to avoid spurious loading of the register, the BSI sig-
nal will be gated during UEM "master-reset", and during "power-on" when PURX is
active. The BSI signal should not change state during normal operation unless the bat-
tery is extracted, in this case the BSI signal will be pulled high, note a falling edge is
required to load the compare register.
MCU Boot.
When the MCU boots, it looks for flash programming indication by reading the status on
the MBUS signal. If this signal is pulled low the MCU sets up the UART in synchronous
mode, and indicates to the flash prommer, by setting FBUS_TX low, that it is ready to
accept the secondary boot-code. All flash programming related SW that is downloaded is
done so to the UPP internal MCU SRAM. The MCU also ends up in "flash programming
mode", if the contents of the flash is empty (reading FFH from the first memory location
in the flash).
Flash Identifiers.
Due to that DCT4 supports many different manufacturers; NMP needs to have so called
flash identifiers. The flash identifier tells the MCU which HW environment it is working
in, and also block size and configuration of the flash.
First Word.
The word contains the information about the number of flash devices connected to the
UPP. It is possible to setup the UPP so that it supports two devices. The MSB bit in the
word indicates the amount of flash devices used by the baseband. The amount of wait
states for the random access is specified over 3-bits in this word. The amount of wait
states is specified related to the system clock used in that system. The MCU PLL factor is
also specified in this word (2-bits).
Second Word.
This word contains information about flash sectors available for EEPROM emulation. If
no RWW capability is indicated, this field then contains information of the serial
EEPROM that is used in the system.
Third Word.
This word contains similar information as the first word but for the second flash if such
is used.
Fourth Word.
This word contains information about the sector configuration of the second flash.