User Guide

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NSM–1

System Module UG3

Original 10/98

UG3/A3–1

Block Diagram of Baseband (Version 2.1 Edit 98) for layout version 9.1

Summary of content (12 pages)

PAGE 1
System Module UG3 Block Diagram of Baseband Original 10/98 NSM–1 (Version 2.1 Edit 98) for layout version 9.
PAGE 2
System Module UG3 NSM–1 Block Diagram of COBBA, CCONT and MAD Original 10/98 UG3/A3–2
PAGE 3
System Module UG3 Circuit Diagram of Power Supply (Version 2.2 Original 10/98 NSM–1 Edit 295) for layout version 10.
PAGE 4
System Module UG3 Circuit Diagram of SIM Connector (Version 2.2 Original 10/98 NSM–1 Edit 97) for layout version 10.
PAGE 5
System Module UG3 Circuit Diagram of CPU Block (Version 2.2 Original 10/98 NSM–1 Edit 200) for layout version 10.
PAGE 6
System Module UG3 Circuit Diagram of Audio Original 10/98 NSM–1 (Version 2.2 Edit 155) for layout version 10.
PAGE 7
System Module UG3 Circuit Diagram of IR Module (Version 2.2 Original 10/98 NSM–1 Edit 126) for layout version 10.
PAGE 8
System Module UG3 NSM–1 RF Block Diagram BAND SELECT 193 MHz 73 MHz 60 MHz 120 MHz BAND SELECT 480 MHz 1950 – 2073 MHz CRFU3 SUMMA GSM 120 MHz PCN 240 MHz GSM PA GSM 120 MHz PCN 240 MHz PCN PA Original 10/98 UG3/A3–8
PAGE 9
System Module UG3 Circuit Diagram of RF Block (Version Original 10/98 NSM–1 2.2 Edit 382) for layout version 10.
PAGE 10
System Module UG3 Circuit Diagram of UIF Original 10/98 NSM–1 (Version 2.2 Edit 124) for layout version 10.
PAGE 11
System Module UG3 NSM–1 Layout Diagram of UG3 – Top (Version 10.3) Layout Diagram of UG3 – Bottom (Version 10.
PAGE 12
System Module UG3 NSM–1 testpoint ref name condition dc–level J101 FBUS_TX active state pulsed DC (0V72.8V) J104 CCONTCSX (CCONT chip select) active state pulse active 0V, non–active 2.8V J108 CHRG_CTRL charger connected pulsed DC (0V/2.8V) J220 V5V active state nominal 5.0V (min 4.8V, max 5.2V) J223 CCONTINT (charger, RTC interrupt) interrupt pulse active 2.8V, non–active 0V J225 EXTSYSRESETX power on reset state 0V, normal state 2.8V J226 VCXOPWR power on active state 2.