User Guide
Table Of Contents
- 10 - SCHEMATICS
- Table of Contents
- Title: Top level schematic
- Title: Top sheet (2)
- Title: DCT4 Common Baseband Schematic (Top level 2)
- Title: 5 pin Production Test Pattern
- Title: RF top sheet schematic
- Title: Mjoelner
- Title: Power amplifier
- Title: BB RF interface components
- Title: DCT4 common BB Schematic (top level)
- Title: RH-4 System connector
- Title: GSM RF BB interface
- Title: RH-4 Audio
- Title: MultiGND symbol bypass
- Title: GENIO and GPIO connection block
- Title: Rohm IR module 1.8V
- Title: Testpoints based Ostrich interface
- Title: Test and emulator interface
- Title: SIM reader
- Title: Testpoints for JTAG emulator
- Title: DC/DC convertor
- Title: RH-4 User interface
- Title: Discrete power management
- Title: Light filtering
- Title: Old power discrete users
- Title: UPP 8M implementation
- Title: Combo memory 128 +8 Mbit
- Title: Discrete decoupling capacitors for UPP
- Title: Discrete capacitors for memory without VFlash 1
- Title: Empty wing sheet
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RFAUXCONV_O(2:0)
RFAUX_O(1:0)
RFCLKGND_I
RFCLK_I
RFCONV_ANA_O(16:0)
RFCONV_DIGI_O(16:0)
RFCONV_O(9:0)
RFICCTRL_O(2:0)
SLOWAD_O(6:0)
9
5
6
2
0
1
SYS
GENIO_O(31:0)
LPRFCLK_I
PUSL_O(3:0)
0
1
2
3
4
5
6
7
8
RXQINP
TXC
TXIOUTN
TXIOUTP
TXP
TXQOUTN
TXQOUTP
VREF1
6
0
2
RF
HGR_TEMP
RESET
RFBUSCLK
RFBUSDA
RFBUSEN1
RFCLK_I
RXIINN
RXIINP
RXQINN
AFC
HGR_TEMP
RESET
RFBUSCLK
RFBUSDA
RFBUSEN1
RXIINN
RXIINP
RXQINN
RXQINP
TXC
TXIOUTN
TXIOUTP
TXP
TXQOUTN
TXQOUTP
VREF1