User Guide

PAMS
Technical Documentation
NME–3
Technical Information
Page 44
Issue 1 10/99
Transmitter
The transmitter chain contains an IQ–modulator, an upconversion mixer, a
power amplifier and a power control loop.
The I and Q signals are generated by the DACs in COBBA in the BB
section, post filtered (RC–network) and fed into the PLUSSA IQ
modulator. The modulated IF signal from this modulator is centered at
116MHz (this is the VHF synthesizer frequency divided by two (232MHz)).
Following the modulator, the signal is fed to a cascaded variable gain
amplifier. It’s gain is set to a fixed value of +4dB by a data word coming
from the MCU in MAD. (This cascaded amplifier is used in other digital
systems as well with stepped amplification values. PLUSSA is a core IC
created to fulfill different standards and frequency concepts.) This first TX
IF signal is then bandpass filtered and fed into the CRFU_1a. The TX part
of this ASIC contains a double balanced Gilbert cell (which is an image
rejection upconversion mixer), a buffer and two phase shifters for the LO
signal. The CRFU_1a’s output is single ended, therefore no external balun
is necessary. The LO signal is generated by the UHF–synthesizer, fed into
the phase shifters and then into the Gilbert cell.
The signal at the final TX frequency is then fed to a TX interstage filter, a
buffer, a PA, a directional coupler, a duplex filter and and the antenna
connector. The TX interstage filter is a bandpass type (dielectric or SAW
filter) which attenuates the spurious signals of the upconverter and
reduces the wideband noise of the signal. The buffer stage is used to
provide the PA with sufficient input power. The final amplification is done
by a Hitachi MosFet PA module. This module is internally matched to 50
ohm and is able to provide 20W of output power using an input level of
approximately +3dBm. The power control range of this device is
approximately 100dB.
The directional coupler is designed to measure the PA output power. The
output power is detected by a detector diode and is used for the power
control loop. A duplex filter provides sufficient TX/RX isolation and filters
the harmonics generated by the PA.
Frequency Synthesizers
Both PLLs use the same reference signal generated by a13 MHz
VCTCXO module ( voltage controlled crystal oscillator ). Temperature
compensation is controlled by AFC ( automatic frequency control ). The
VCTCXO frequency is adjusted using the signal received from the base
station. AFC is generated by baseband with a 11 bit conventional DAC in
COBBA.
PLUSSA contains the UHF PLL with prescaler, N, A and R dividers,
phase detector and charge pumps. The prescaler is a dual modulus 64/65
(P/P+1) type and the charge pump supply current to the external loop
filter. All PLL dividers are programmed via the 3–wire bus (i.e. SDATA,
SCLK and SENA1).
The output signal of the prescaler is fed to N and A divider which
produces one of the inputs to the phase detector.