User Guide

PAMS
Technical Documentation
NME–3
JBD–2 User Guide
Page 20
Issue 1 10/99
Control Unit (EPLD) Description
The control unit is implemented with a programmable logic block
Functions of the EPLD:
PWM Generator of BLD signal
Handling of all switches on the front panel
It links the remote control interface with the manual control elements
The EPLD was designed with the “ALTERA MAX+PLUS II” version 9.1 on
a personal computer. The design is hierarchically structured. A big part of
the EPLD circuit design is implemented in schematics and the rest is in
VHDL–scripts and truth tables. The VHDL script is be used to design the
PWM generator of the backlight circuit. The truth–tables are preferential
used for decoders.
Audio mode
Counter with
wraparound
PWM
Generator
Audio mode path
Decoder
To
audio path relays
13kHz
To
audio mode switch
To
BLD switch
To
BLD transistor
To
REMOTE connector
RM_Enable
RM_Enable
RM_Enable
RM_Enable
To
the remaining switches
Unit to control
the rest of
signals
Scanning of
the Audio
Mode
Switch
Figure 17. Simplified Block Diagram of EPLD